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| 71m6533/71m6533h demo board user?s manual page: 1 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 71m6533/71m6533h demo board user?s manual 5/9/2008 3:13 pm v1-2 teridian semiconductor corporation 6440 oak canyon rd., suite 100 irvine, ca 92618-5201 phone: (714) 508-8800 ? fax: (714) 508-8878 http://www.teridian.com/ meter.support@teridian.com
71m6533/71m6533h demo board user?s manual page: 2 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 teridian semiconductor corporation makes no warranty for the us e of its products, other than expressly contained in the company ?s warranty detailed in the teridian semiconductor corporation standard terms and conditions. the company assumes no responsibilit y for any errors which may appear in this doc ument, reserves the right to change devices or specificat ions detailed herein at any time without notice and does not make any commitment to update the information contained herein. 71m6533/71m6533h demo board user?s manual page: 3 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 71m6533/71m6533h 3-phase energy meter ic demo board user?s manual 71m6533/71m6533h demo board user?s manual page: 4 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 table of contents 1 getting started ............................................................................................................................... ................. 7 1.1 general .............................................................................................................................. ...................................... 7 1.2 safety and esd notes .............................................................................................................................. .............. 7 1.3 demo kit contents .............................................................................................................................. ................... 8 1.4 demo board versions .............................................................................................................................. .............. 8 1.5 compatibility ............................................................................................................................... ............................ 8 1.6 suggested equipment not included ..................................................................................................................... 8 1.7 demo board test setup .............................................................................................................................. ........... 9 1.7.1 power supply setup .............................................................................................................................. .......... 11 1.7.2 cable for serial connection (debug board) .................................................................................................... 11 1.7.3 checking operation ............................................................................................................................... .......... 11 1.7.4 serial connection setup .............................................................................................................................. .... 13 1.8 using the demo board .............................................................................................................................. ........... 14 1.8.1 serial command language ............................................................................................................................. 15 1.8.2 using the demo board fo r energy measurements .......................................................................................... 23 1.8.3 adjusting the kh factor for the demo board ................................................................................................... 23 1.8.4 adjusting the demo boards to different current transformers ....................................................................... 24 1.8.5 adjusting the demo boards to different voltage dividers ............................................................................... 24 1.9 calibration parameters .............................................................................................................................. .......... 25 1.9.1 general calibration procedure ........................................................................................................................ 25 1.9.2 calibration macro file .............................................................................................................................. ....... 26 1.9.3 updating the demo code (hex file) ................................................................................................................. 26 1.9.4 updating calibration data in flash or eepr om without using the ice or the tfp-2 ..................................... 26 1.9.5 automatic gains calibration ............................................................................................................................ 2 7 1.9.6 loading the code for the 6533 into the demo board ...................................................................................... 27 1.9.7 the programming interf ace of the 71m6533/6533h ....................................................................................... 29 1.10 demo code .............................................................................................................................. .......................... 30 1.10.1 demo code description .............................................................................................................................. . 30 1.10.2 important demo code mpu parameters ..................................................................................................... 31 1.10.3 useful cli commands involving the mpu and ce ...................................................................................... 38 2 application information ............................................................................................................................. 39 2.1 calibration theory .............................................................................................................................. .................. 39 2.1.1 calibration with three measurements ............................................................................................................. 39 2.1.2 calibration with five measurements ................................................................................................................ 41 2.2 calibration procedures .............................................................................................................................. .......... 42 2.2.1 calibration procedure with three measurements ........................................................................................... 43 2.2.2 calibration procedure with five measurements .............................................................................................. 44 2.2.3 calibration procedure for rogowski coil sensors ........................................................................................... 44 2.2.4 calibration spreadsheets .............................................................................................................................. .. 45 2.2.5 compensating for non-linearities ................................................................................................................... 49 2.3 power saving measures .............................................................................................................................. ........ 50 2.4 schematic information .............................................................................................................................. ........... 51 2.4.1 components for the v1 pin ............................................................................................................................. 51 2.4.2 reset circuit .............................................................................................................................. ...................... 51 2.4.3 oscillator .............................................................................................................................. ........................... 52 2.4.4 eeprom ............................................................................................................................... .......................... 52 2.4.5 lcd .............................................................................................................................. ................................... 53 2.4.6 optical interface .............................................................................................................................. ................ 53 71m6533/71m6533h demo board user?s manual page: 5 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.5 testing the de mo bo ard ........................................................................................................ .............................. 54 2.5.1 functional meter test ............................................................................................................................... ....... 54 2.5.2 eeprom ............................................................................................................................... .......................... 56 2.5.3 rtc .............................................................................................................................. ................................... 56 2.5.4 hardware watchdog timer .............................................................................................................................. 56 2.5.5 lcd .............................................................................................................................. ................................... 56 2.6 teridian application notes .............................................................................................................................. . 58 3 hardware description .............................................................................................................................. ... 59 3.1 d6533t14a3 board description: jumpers, switches and test points ............................................................ 59 3.2 board hardware specifications .......................................................................................................................... 62 4 appendix .............................................................................................................................. ............................... 63 4.1 71m6533 demo board electrical schematic ...................................................................................................... 64 4.2 71m6533 demo board bill of material ................................................................................................................. 67 4.3 71m6533 demo board pcb layout ..................................................................................................................... 68 4.4 debug board bill of material .............................................................................................................................. . 74 4.5 debug board schematics .............................................................................................................................. ...... 75 4.6 debug board pcb layout ............................................................................................................................... ..... 76 4.7 teridian 71m6533 pin-out information ............................................................................................................ 79 4.8 revision history .............................................................................................................................. ..................... 83 list of figures figure 1-1: teridian d6533t14a3 demo b oard with debug board: basic connections ................................................. 9 figure 1-2: block diagram for the teridi an d6533t14a3 demo board with debug board ............................................ 10 figure 1-3: hyperterminal sample window with disconnect button (arrow) ..................................................................... 13 figure 1-4: port speed and handshake set up (left) and port bit setup (right) .................................................................. 14 figure 1-5: command line help display ........................................................................................................................... 15 figure 1-6: typical calibration macro file ......................................................................................................................... 26 figure 1-7: emulator window showing reset and erase buttons (see arrows) ............................................................... 28 figure 1-8: emulator window showing erased flash memory and file load menu ......................................................... 28 figure 2-1: watt meter with gain and phase errors. ......................................................................................................... 39 figure 2-2: phase angle definitions .............................................................................................................................. .... 43 figure 2-3: calibration spreads heet for three measurements ......................................................................................... 47 figure 2-4: calibration spreads heet for five measurements ............................................................................................ 47 figure 2-5: calibration spreadsheet for rogowski coil ...................................................................................................... 48 figure 2-6: non-linearity caus ed by quantification noise ................................................................................................ 49 figure 2-7: voltage divider for v1 .............................................................................................................................. ....... 51 figure 2-8: external components for resetz ................................................................................................................. 51 figure 2-9: oscillator circuit .............................................................................................................................. ................ 52 figure 2-10: eeprom circuit .............................................................................................................................. ............. 52 figure 2-11: lcd connections .............................................................................................................................. ............ 53 figure 2-12: optical interface block diagram .................................................................................................................... 53 figure 2-13: meter with calibration system ...................................................................................................................... 54 figure 2-14: calibration system screen ............................................................................................................................ 55 figure 2-15: load line in different ial mode at room temperature ................................................................................... 55 figure 3-1: d6533t14a3 demo board - board description .............................................................................................. 61 figure 4-1: teridian d6533t14a3 demo board: electrical schematic 1/3 .................................................................... 64 figure 4-2: teridian d6533t14a3 demo board: electrical schematic 2/3 .................................................................... 65 figure 4-3: teridian d6533t14a3 demo board: electrical schematic 3/3 .................................................................... 66 figure 4-4: teridian d6533t 14a3 demo board: top view ........................................................................................... 68 figure 4-5: teridian d6533t 14a3 demo board: top copper ....................................................................................... 69 figure 4-6: teridian d6533t14a3 demo board: middle layer 1 (ground plane) ......................................................... 70 71m6533/71m6533h demo board user?s manual page: 6 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-7: teridian d6533t14a3 demo board: middle layer 2 (supply plane) .......................................................... 71 figure 4-7: teridian d6533t14a3 demo board: bottom copper .................................................................................. 72 figure 4-9: teridian d6533t14a3 demo board: bottom view ...................................................................................... 73 figure 4-9: debug board: electrical schematic ................................................................................................................. 75 figure 4-10: debug board: top view .............................................................................................................................. .. 76 figure 4-11: debug board: bottom view ........................................................................................................................... 76 figure 4-12: debug board: top signal layer .................................................................................................................... 77 figure 4-13: debug board: middle layer 1 (ground plane) .............................................................................................. 77 figure 4-14: debug board: middle layer 2 (supply plane) ............................................................................................... 78 figure 4-15: debug board: bottom trace layer ............................................................................................................... 78 figure 4-16: teridian 71m6533/71m6533h eplqfp100: pinout (top view) .................................................................. 82 list of tables table 1-1: jumper settings on debug board ..................................................................................................................... 11 table 1-2: straight cable connections .............................................................................................................................. . 11 table 1-3: null-modem cable connections ........................................................................................................................ 11 table 1-4: ce ram locations for calibration constants ................................................................................................... 25 table 1-5: flash programming interface signals .............................................................................................................. 29 table 1-6: mpu input parameters for metering ................................................................................................................. 32 table 1-7: selectable pulse sources .............................................................................................................................. .. 33 table 1-8: mpu instantaneous output variables .............................................................................................................. 34 table 1-9: mpu status word bit assignment .................................................................................................................... 36 table 1-10: mpu accumulation output variables ............................................................................................................. 37 table 1-11: cli commands for data memory ................................................................................................................... 38 table 2-1: power saving measures .............................................................................................................................. .... 50 table 3-1: d6533t14a3 demo board description ............................................................................................................ 59 table 3-2: d6533t14a3 demo board description ............................................................................................................ 61 table 4-1: d6533t14a3 demo board: bill of material ...................................................................................................... 67 table 4-2: debug board: bill of material ............................................................................................................................ 74 table 4-3: 71m6533/71m6533h pin description table 1/3 ............................................................................................... 79 table 4-4: 71m6533/71m6533h pin description table 2/3 ............................................................................................... 79 table 4-5: 71m6533/71m6533h pin description table 3/3 ............................................................................................... 81 71m6533/71m6533h demo board user?s manual page: 7 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1 1 getting started 1.1 general the teridian semiconductor corporation (tsc) d 6533t14a3 demo board is a demonstration board for evaluating the 71m6533/71m6533h device for 3-phase electronic power mete ring applications. it incorporates a 71m6533 or 71m6533h integrated circuit, peripheral circuitry such as a serial eeprom, emulator port, and on- board power supply as well as a companion debug board that allows a connection to a pc through a rs232 port. the demo board allows the ev aluation of the 71m6533 or 71m6533h energy meter chip for measurement accuracy and overall system use. the board is pre-programmed with a demo program in the flash memory of the 71m6533/6533h ic. this em- bedded application is developed to exercise all low-level f unction calls to directly manage the peripherals, flash programming, and cpu (clock, ti ming, power savings, etc.). the 71m6533/6533h ic on the demo board is pre-programmed with default ca libration factors. since current sensors are not part of the demo kit, the demo b oard is tested but not calib rated at the factory. 1.2 safety and esd notes connecting live voltages to the demo board system will result in potent ially hazardous voltages on the demo board. the demo system is esd sensitive! esd precautions should be taken when handling the demo board! extreme caution should be taken when handling the demo board once it is connected to live voltages! 71m6533/71m6533h demo board user?s manual page: 8 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.3 demo kit contents ? demo board d6533t14a3 with 71m6533/ 71m6533h ic and pre-loaded demo program: ? debug board ? two 5vdc/1,000ma universal wall transformers wi th 2.5mm plug (switchcraft 712a compatible) ? serial cable, db9, male/femal e, 2m length (digi-key ae1020-nd) ? cd-rom containing document ation (data sheet, board schematics, bom, layout), demo code (sources and executable), and utilities the cd-rom contains a file named readme.txt that specifies all file s found on the media and their purpose. 1.4 demo board versions currently, only the following version of the demo board is available: ? demo board d6533t14a3 (standard) 1.5 compatibility this manual applies to the following hardware and software revisions: ? 71m6533 or 71m6533h chip revision a03 ? demo kit firmware revision 4.p6b or later ? demo board d6533t14a3 1.6 suggested equipment not included for functional demonstration: ? pc w/ ms-windows ? versions xp, me, or 2000, equipped with rs232 port (com port) via db9 connector for software development (mpu code): ? signum ice (in circuit emulator): adm-51 http://www.si gnum.com ? keil 8051 ?c? compiler kit: ca51 http://www.keil.com/c51/c a51kit.htm , http://www.keil.com/pr oduct/sales.htm 71m6533/71m6533h demo board user?s manual page: 9 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.7 demo board test setup figure 1-1 shows the basic connections of the demo board plus debug board with the external equipment for desktop testing, i.e. wit hout live power applied. for desktop test ing, both the demo and debug board may be powered with just the 5vdc power supplies. host pc debug board demo board two power supplies (100vac to 240vac, 5v/1adc output) power (5vdc) power 5vdc figure 1-1: teridian d6533t 14a3 demo board with debug board: basic connections the d6533t14a3 demo board block diagram is shown in figure 1-2 . the configuration consists of a stand- alone (round) meter demo board and an optional debug b oard. the demo board contains all circuits necessary for operation as a meter, including display, calibration leds, and internal power supply. the debug board, uses a separate power supply, and is optically isolated from t he demo board. it interfaces to a pc through a 9 pin serial port connector. for serial communication between the pc and the teridian 71m6533/71m6533h, the debug board needs to be plugged with its connector j3 into connector j2 of the demo board. connections to the external signals to be measured, i.e. scaled ac voltages and cu rrent signals derived from shunt resistors or current transformers, are provided on the rear side of the demo board. caution: it is recommended to set up the demo board with no live ac voltage connected, and to connect live ac voltag es only after the user is familiar with the demo system. all input signals are referenced to the v3p3a (3.3v power supply to the chip). 71m6533/71m6533h demo board user?s manual page: 10 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 demonstration meter ia ib ic vc vb neutral iap ibp icp v3p3a vc vb va 3.3v va gnd v3p3 gnd 5v dc eeprom ice connector dio56 dio57 dio58 tx rx db9 to pc com port j5 68 pin connector to ni pci-6534 dio board 6533 single chip meter tmuxout cktest 3.3v lcd dio4 dio5 idp ineutral external current transformers ian ibn icn v3p3sys wh varh dio6/wpulse dio7/rpulse pulse outputs dio9/ypulse dio8/xpulse v3p3sys v3p3d vbat pb battery (optional) jp8 pb on-board components powered by v3p3d opto opto opto opto opto 5v dc v5_dbg gnd_dbg v5_dbg v5_dbg rs-232 interface gnd_dbg v5_dbg opto opto fpga 04/25/2008 v5_ni ce heartbeat (1hz) mpu heartbeat (5hz) debug board (optional) rtm interface jp21 j2 n/c n/c 4 15, 16 13, 14 6 6 8 12 10 3 1 2 5, 7, 9, 11 gnd v3p3sys jp1 idn figure 1-2: block diagram fo r the teridian d6533t14a3 de mo board with debug board 71m6533/71m6533h demo board user?s manual page: 11 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.7.1 power supply setup there are several choices for the meter power supply: ? internal (using phase a of the ac line voltage). the internal power supply is only suitable when the phase a voltage exceeds 220v rms. a jumper needs to be installed across jp1 on t he bottom of the board. ? external 5vdc connector (j1) on the demo board. ? external 5vdc connector (j1) on the debug board. 1.7.2 cable for serial connection (debug board) for connection of the db9 serial port to a pc, either a straight or a so-called ? null-modem? cable may be used. jp1 and jp2 are plugged in for the strai ght cable, and jp3/jp4 ar e empty. the jumper c onfiguration is reversed for the null-modem cable, as shown in table 1-1 . cable configuration mode jumpers on debug board jp1 jp2 jp3 jp4 straight cable default installed installed -- -- null-modem cable alternative -- -- installed installed table 1-1: jumper settings on debug board jp1 through jp4 can also be used to alter the connecti on when the pc is not conf igured as a dce device. table 1-2 shows the connections necessary for t he straight db9 cable and the pin definitions. pc pin function demo board pin 2 tx 2 3 rx 3 5 signal ground 5 table 1-2: straight cable connections table 1-3 shows the connections necessary for t he null-modem db9 cable and the pin definitions. pc pin function demo board pin 2 tx 3 3 rx 2 5 signal ground 5 table 1-3: null-modem cable connections 1.7.3 checking operation a few seconds after power up, the lcd display on t he demo board should display this brief greeting: h e l l 0 the ?hello? message should be followed by the display of accumulated energy: 3. 0. 0 0 1 the wh display should be followed by the text ?wh?, as shown below: 71m6533/71m6533h demo board user?s manual page: 12 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 3. w h the decimal dot in the rightmost segment will be blinking, indicating activity of the mpu inside the 71m6533/6533h. the demo code allows cycling of the display using t he pb button. by briefly pre ssing this button, the next available parameter from table 1-4 is selected. this makes it easy to navigate various displays for demo boards without having to use t he command line interface (cli). step display in left-most digit(s) text display correspon- ding cli command displayed parameter 1 1 delt c m1 temperature difference from calibration temperature. displayed in 0.1c 2 2 hz m2 frequency at the va_in input [hz] 3 3 wh m3 accumulated real energy [wh]. the default display setting after power-up or reset. 4 4 wh m4 accumulated exported real energy [wh]. 5 5 varh m5 accumulated reactive energy [varh]. 6 6 varh m6 accumulated exported reactive energy [varh]. 7 7 vah m7 accumulated apparent energy [vah]. 8 8 hours m8 elapsed time 9 9 time m9 time of day (hh.mm.ss) 10 -- date m10 date (yyyy.mm.dd) 11 11 pf m11 power factor 12 12 -- m12 v/v phase angle [degrees] 13 13 edges m13 zero crossings of the mains voltage 14 14 pulses m14 pulse counter 15 15 a m15 rms current 16 16 v m16 rms voltage 17 17 bat v m17 battery voltage table 1-4: selectable display options 71m6533/71m6533h demo board user?s manual page: 13 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.7.4 serial connection setup after connecting the db9 serial port to a pc, start t he hyperterminal application and create a session using the following parameters: port speed: 9600 bd or 300bd (see below) data bits: 8 parity: none stop bits: 1 flow control: xon/xoff see section 3.1 for proper selection of the operati on mode when main power is removed: ? a jumper across pins 2-3 (vbat-gnd) of jp16 indicate s that no external battery is available. the ic will stay in brownout mode when the system power is down and it will communicate at 9600bd . ? a jumper across pins 1-2 (batmode-vbat) indicates t hat an external battery is available. the ic will be able to transition from brownout mode to sl eep and lcd modes when the system power is down and it will communicate at 300bd . hyperterminal can be found by selecting programs ? accessories ? communications from the windows ? start menu. the connection param eters are configured by selecting file ? properties and then by pressing the configure button. port speed and flow control are confi gured under the general tab ( figure 1-4 , left), bit settings are configured by pressi ng the configure button ( figure 1-4 , right), as shown below. a setup file (file name ?demo board connection.ht?) for hyperte rminal that can be loaded with file ? open is also provided with the tools and utilities. port parameters can only be adjusted when the connection is not active. the disconnect button, as shown in figure 1-3 must be clicked in order to disconnect the port. figure 1-3: hyperterminal sample window with disconnect button (arrow) 71m6533/71m6533h demo board user?s manual page: 14 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 1-4: port speed and handshake se tup (left) and port bit setup (right) once, the connection to the demo board is established, press 71m6533/71m6533h demo board user?s manual page: 15 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.8.1 serial command language the demo code residing in the flash memory of t he 71m6533/6533h provides a conv enient way of examining and modifying key meter parameters. once the demo board is connected to a pc or terminal per the instructions given in section 1.7.2 and 1.7.4 , typing ? ? ? will bring up the list of commands shown in figure 1-5 . figure 1-5: command line help display the tables in this chapter de scribe the commands in detail. 71m6533/71m6533h demo board user?s manual page: 16 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 commands to display he lp on the cli commands: ? help comment description: command help available for each of the options below. command combinations: ? command line interpreter help menu. ?] display help on access ce data ram ?) display help on access mpu ram ?, display help on repeat last command ?/ display help on ignore rest of line ?c display help on compute engine control. ?cl display help on calibration. ?ee display help on eeprom control ?er display help on error recording ?i display help on information message ?m display help on meter display control ?mr display help on meter rms display control ?r display help on sfr control ?rt display help on rtc control ?t display help on trim control ?w display help on the wait/reset command ?z display help on reset examples: ?? display the command line interpreter help menu. ?c displays compute engine control help. commands for ce data access: ] ce data access comment description: allows user to read from and write to ce data space. usage: ] [starting ce data address] [option]?[option] command combinations: ]a??? read consecutive 16-bit words in decimal, starting at address a ]a$$$ read consecutive 16-bit words in hex, starting at address a ]a=n=n write consecutive memory values, starting at address a ]u update default version of ce data in flash memory example: ]40$$$ reads ce data words 0x40, 0x41 and 0x42. ]7e=12345678=9876abcd writes two words starting @ 0x7e all ce data words are in 4-byte (32-bit) format. typi ng ]a? will access the 32-bit word located at the byte address 0x1000 + 4 * a = 0x1028. 71m6533/71m6533h demo board user?s manual page: 17 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 commands for mpu/xdata access: ) mpu data access comment description: allows user to read from and write to mpu data space. usage: ) [starting mpu data address] [option]?[option] command combinations: )a??? read three consecutive 32-bit words in decimal, starting at address a )a$$$ read three consecutive 32-bit words in hex, starting at address a )a=n=m write the values n and m to two consecutive addresses starting at address a ?) display useful ram addresses. example: )08$$$$ reads data words 0x08, 0x0c, 0x10, 0x14 )04=12345678=9876abcd writes two words starting @ 0x04 mpu or xdata space is the address range for the mpu xram (0 x0000 to 0xfff). all mpu data word s are in 4-byte (32-bit) format. typing ]a? will access the 32-bit word located at the by te address 4 * a = 0x28. the ener gy accumulation registers of the demo code can be accessed by typing two dollar signs (?$$ ?), typing question marks will display negative decimal values if the most significant bit is set. commands for dio ram (configuration ram) and sfr control: r dio and sfr control comment description: allows the user to read from and write to dio ram and special function registers (sfrs). usage: r [option] [register] ? [option] command combinations: rix? select i/o ram location x (0x2000 offset is automatically added) rx? select internal sfr at address x ra???... read consecutive sfr registers in decimal, starting at address a ra$$$... read consecutive registers in hex, starting at address a ra=n=m? set values of consecutiv e registers to n and m starting at address a example: ri2$$$ read dio ram registers 2, 3, and 4 in hex. dio or configuration ram space is the address range 0x2000 to 0x20ff. this ram contains r egisters used for configuring basic hardware and functional properties of the 71m6533/6533h and is organized in bytes (8 bits). the 0x2000 offset is automatically added when the command ri is typed. the sfrs (special function registers) are located in internal ram of the 80515 core, starting at address 0x80. 71m6533/71m6533h demo board user?s manual page: 18 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 commands for eeprom control: ee eeprom control comment description: allows user to enable read and write to eeprom. usage: ee [option] [arguments] command combinations: eecn eeprom access (1 ? enable, 0 ? disable) eera.b read eeprom at address 'a' for 'b' bytes. eesabc..xyz write characters to buffer (sets write length) eeta transmit buffer to eeprom at address 'a'. eewa.b...z write values to buffer cls saves calibration to eeprom example: eeshello eet$0210 writes 'hello' to buffer, then transmits buffer to eeprom starting at address 0x210. due to buffer size restrictions, the maximum num ber of bytes handled by the eeprom command is 0x40. auxiliary commands: typing a comma (?,?) repeats the command issued from the previous command li ne. this is very helpful when examining the value at a certain address over time, su ch as the ce dram address for the temperature (0x40). the slash (?/?) is useful to separat e comments from commands when sending macro text files via the serial interface. all characters in a line after the slash are ignored. commands controlling the ce, tmux and the rtm: c compute engine control comment description: allows the user to enable and configure the compute engine. usage: c [option] [argument] command combinations: cen compute engine enable (1 ? enable, 0 ? disable) ctn select input n for tmux output pin. n is interpreted as a decimal number. cren rtm output control (1 ? enable, 0 ? disable) crsa.b.c.d selects ce addresses for rtm output example: ce0 disables ce, followed by ?ce off? display on lcd. the demo code will reset if the wd timer is enabled. ct3 selects the vbias signal for the tmux output pin 71m6533/71m6533h demo board user?s manual page: 19 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 commands controlling the auto-calibration function: cl auto-calibration control comment description: allows the user to initiate auto-calib ration and to store calibration values. usage: cl [option] command combinations: clb begin auto-calibration. prior to auto-calibration, the calibration coefficients are automatically restored from flash memory. cls save calibration coefficients to eeprom starting at address 0x0004 clc use machine-readable calibration protocol clr restore calibration coefficients from eeprom cld restore coefficients from flash memory example: clb starts auto-calibration and saves data automatically. before starting the auto-calibration process, target va lues for voltage, duration and current must be entered in mpu ram (see section 1.9.5 ) and the target voltage and current must be applied constantly during calibration. calibration factors can be saved to eeprom using the cls command. commands controlling the pulse counter function cp pulse-count control comment description: allows the user to control the pulse count functions. usage: cp [option] command combinations: cpa start pulse counting for time period defined with the cpd command. pulse counts will display with commands m15.2, m16.2 cpc clear the absolute pulse count displays (shown with commands m15.1, m16.1) cpdn set time window for pulse counters to n seconds, n is inter- preted as a decimal number. example: cpd60 set time window to 60 seconds. pulse counts accumulated over a time window defined by the cpd command will be displayed by m14 after the defined time has expired. m14 will display the absolute pulse count for the w and var outputs. these displays are reset to zero with the cpc command (or the xram write )1=2). commands for identification and information: i information messages comment description: allows user to read information messages. usage: i displays complete version information the i command is mainly used to identify the re visions of demo code and the contained ce code. 71m6533/71m6533h demo board user?s manual page: 20 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 commands for controlling the rms values shown on the lcd display: mr meter rms display control (lcd) comment description: allows user to select meter rms display for voltage or current. usage: mr [option]. [option] command combinations: mr1. [phase] displays instantaneous rms current mr2. [phase] displays instantaneous rms voltage example: mr1.3 displays phase c rms current. phase 4 is the measured neutral current. no error message is issued when an invalid parameter is entered, e.g. mr1.8. commands for controlling the mpu power save mode: ps power save mode comment description: enters power save mode disables ce, a dc, ckout, eck, rtm, ssi, tmux vref, and serial port, sets mpu clock to 38.4khz. usage: ps return to normal mode is achieved by resetting the mpu (z command). commands for controlling the rtc: rt real time clock control comment description: allows the user to read and set the real time clock. usage: rt [option] [value] ? [value] command combinations: rtdy.m.d.w: day of week (year, month, day, weekday [1 = sunday]). if the weekday is omitted it is set automatically. rtr read real time clock. rtth.m.s time of day: (hr, min, sec). rtas.t real time adjust: (start, trim). allows trimming of the rtc. if s > 0, the speed of the clock will be adjusted by ?t? parts per billion (ppb). if the ce is on, the value entered with 't' will be changing with temperature, based on y_cal, y_calc and y_calc2. example: rtd05.03.17.5 programs the rtc to thursday, 3/17/2005 rta1.+1234 speeds up the rtc by 1234 ppb. the ?military time format? is used for the rtc, i.e. 15:00 is 3:00 pm. 71m6533/71m6533h demo board user?s manual page: 21 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 commands for accessing the trim control registers: t trim control comment description: allows user to read trim and fuse values. usage: t [option] command combinations: t4 read fuse 4 (trimm). t5 read fuse 5 (trimbga) t6 read fuse 6 (trimbgb). example: t4 reads the trimm fuse. these commands are only accessible for the 71m6533h (0.1%) parts. when used on a 71m6533 (0.5%) part, the results will be displayed as zero. reset commands: w reset comment description: watchdog control usage: w halts the demo code program, thus suppressing the trigger- ing of the hardware watchdog timer. this will cause a reset, if the watchdog timer is enabled. 71m6533/71m6533h demo board user?s manual page: 22 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 commands for controlling the metering values shown on the lcd display: m meter display control (lcd) comment description: allows user to select internal variables to be displayed. usage: m [option]. [option] command combinations: m wh total consumption (display wraps around at 999.999) m0 wh total consumption (display wraps around at 999.999) m1 temperature (c delta from nominal) m2 frequency (hz) m3. [phase] wh total consumption (display wraps around at 999.999) m4. [phase] wh total inverse consum ption (display wraps around at 999.999) m5. [phase] varh total consumption (display wraps around at 999.999) m6. [phase] varh total inverse consum ption (display wraps around at 999.999) m7. [phase] vah total (display wraps around at 999.999) m8 operating time (in hours) m9 real time clock m10 calendar date m11. [phase] power factor m13 mains edge count for the last accumulation interval m13.1 main edge count (accumulated) ? zero transitions of the input signal m13.2 main edge count for the last accumulation interval m14.1 absolute count for wh pulses. reset with cpc command. m14.2 absolute count for varh pulses. reset with cpc command. m15.[phase] i rms display m16.[phase] v rms display example: m3.3 displays wh total consumption of phase c. m5.0 displays varh total consumption for all phases. displays for total consumption wrap around at 999.999w h (or varh, vah) due to the limited number of available display digits. internal registers (counters) of the demo code are 64 bits wide and do not wrap around. when entering the phase parameter, use 1 for phase a, 2 for phase b, 3 for phase c, and 0 or blank for all phases . 71m6533/71m6533h demo board user?s manual page: 23 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.8.2 using the demo board for energy measurements the 71m6533/6533h demo board was designed for use with current transformers (ct). the demo board may immediately be used with curr ent transformers having 2,000:1 winding ratio and is programmed for a kh factor of 3.2 and (see section 1.8.4 for adjusting the demo board for transformers with different turns ratio). once, voltage is applied and load current is flowing, the red led d5 will fl ash each time an energy sum of 3.2 wh is collected. the lcd display will show the accumulated energy in wh when set to display mode 3 (command >m3 via the serial interface). similarly, the red led d6 will flash each time an energy sum of 3.2 varh is collected. the lcd display will show the accumulated energy in varh when set to display mode 5 (command >m5 via the serial interface). 1.8.3 adjusting the kh factor for the demo board the 71m6533/6533h demo board is shipped with a pre-progr ammed scaling factor kh of 3.2, i.e. 3.2wh per pulse. in order to be used with a calibrated load or a meter calibration system, the board should be connected to the ac power source using the s pade terminals on the bottom of the board. the current transformers should be connected to the dual-pin headers on the bottom of the board. the kh value can be derived by reading the values for imax and vmax (i.e. the rms current and voltage values that correspond to the 250mv maximum input signal to the ic), and inserting them in the following equation for kh: kh = imax * vmax * 66.1782 / (in_8 * wrate * n acc * x) = 3.19902 wh/pulse. the small deviation between the adjusted kh of 3.19902 and the ideal kh of 3. 2 is covered by calibration. the default values used for the 71m6533/6533h demo board are: wrate: 683 imax: 208 vmax: 600 in_8: 1 (controlled by ia_shunt = -15) n acc : 2520 x: 1.5 explanation of factors used in the kh calculation: wrate: the factor input by the user to determine kh imax: the current input scaling factor, i.e. t he input current generating 177mvrms at the ia/ib/ic input pins of the 71m6533. 177mv rms is equivalent to 250mv peak. vmax: the voltage input scaling factor, i.e. t he voltage generating 177mvrms at the va/vb/vc input pins of the 71m6533 in_8: the setting for the additional adc gain (8 or 1) determined by the ce register ia_shunt n acc : the number of samples per accumulation interval, i.e. pre_samps * sum_cycles x: the pulse rate control fact or determined by the ce registers pulse_slow and pulse_fast almost any desired kh factor can be selected for the demo board by resolving the formula for wrate: wrate = (imax * vmax * 66.1782) / (kh * in_8 * n acc * x) for the kh of 3.2wh, the value 683 (decimal) should be entered for wrate at location 2d (using the cli command >]2d=+683 ). 71m6533/71m6533h demo board user?s manual page: 24 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.8.4 adjusting the demo boards to different current trans- formers the demo board is prepared for use with 2000:1 current transformers (cts). this means that for the unmodified demo board, 208a on the primary side at 2000:1 ratio result in 104ma on the secondary side, causing 177mv at the 1.7 resistor pairs r24/r25, r36/r37, r56/r57 (2 x 3.4 in parallel). in general, when imax is applied to the primary side of the ct, the voltage v in at the ia, ib, or ic input of the 71m6533 ic is determined by the following formula: v in = r * i = r * imax/n where n = transformer winding ratio, r = resistor on the secondary side if, for example, imax = 208a are applied to a ct with a 2500:1 ratio, only 83.2ma will be generated on the se- condary side, causing only 141mv. the steps required to adapt a 71m6533 demo board to a transformer with a winding ratio of 2500:1 are outlined below: 1) the formula r x = 177mv/(imax/n) is applied to calculate the new resistor r x . we calculate rx to 2.115 2) changing the resistors r24/r25, r106/r107 to a combined resistance of 2.115 (for each pair) will cause the desired voltage drop of 177mv appearing at the ia, ib , or ic inputs of the 71m6533 ic. 3) wrate should be adjusted to achieve the desired kh factor, as described in 1.8.3 . simply scaling imax is not recommended, since peak voltages at the 71m6533 inputs should always be in the range of 0 through 250mv (equivalent to 177mv rms). if a ct with a much lower winding ratio than 1:2,000 is used, higher secondary currents will result, causing exce ssive voltages at the 71m6533 inputs. conversely, cts with much higher ratio will tend to decrease the useable signal voltage range at the 71m6533 inputs and may thus decrease resolution. 1.8.5 adjusting the demo boards to different voltage dividers the 71m6533 demo board comes equipped with its own netwo rk of resistor dividers for voltage measurement mounted on the pcb. the resistor values (for the d6533t14a3 demo board) are 2.5477m (r15-r21, r26- r31 combined) and 750 (r32), resulting in a ratio of 1:3,393.933. this means that vmax equals 176.78mv*3,393.933 = 600v. a large value for vmax has been selected in order to have headroom for overvoltages. this choice need not be of concern, since the adc in the 71m6533 has enough resolution, even when operating at 120vrms or 240vrms. if a different set of voltage dividers or an external voltage transformer ( potential transformer) is to be used, scaling techniques similar to those applied for the current transformer should be used. in the following example we assume t hat the line voltage is not applied to t he resistor divider for va formed by r15-r21, r26-r31, and r32, but to a voltage transformer with a ratio n of 20: 1, followed by a simple resistor divider. we also assume that we want to maintain the value for vmax at 600v to provide headroom for large voltage excursions. when applying vmax at the primary side of the transformer, the secondary voltage v s is: v s = vmax / n v s is scaled by the resistor divider ratio r r . when the input voltage to the vo ltage channel of t he 71m6533 is the desired 177mv, v s is then given by: v s = r r * 177mv resolving for r r , we get: r r = (vmax / n) / 177mv = (600v / 30) / 177mv = 170.45 this divider ratio can be implemented, for example, with a combination of one 16.95k and one 100 resistor. 71m6533/71m6533h demo board user?s manual page: 25 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 if potential transformers (pts) are used instead of resistor dividers, phase sh ifts will be introduced that will re- quire negative phase angle compensation. teridian can supply demo code that accepts negative calibration factors for phase. 1.9 calibration parameters 1.9.1 general calibration procedure any calibration method can be used with the 71m6533/6533h chips. this demo board user?s manual presents calibration methods with three or five measurements as recommended methods, because they work with most manual calibration systems based on counting "pul ses" (emitted by leds on the meter). naturally, a meter in mass production will be equipped with special calibration code offering capabilities beyond those of the demo code. it is basically possible to ca librate using voltage and current readings, with or without pulses involved. for this purpose, the mpu demo code can be modified to display averaged voltage and current values (as opposed to momentary values). also, automated calibration equipment can communicate with the demo boards via the serial interface and ex tract voltage and current readings. this is possible even with the unmodified demo code. complete calibration procedures are given in section 2.2 of this manual. regardless of the calibration procedure used, parameters (calibration factors) will result that will have to be applied to the 71m6533/6533h chip in order to make the chip apply the modified gains and phase shifts necessary for accurate operation. table 1-5 shows the names of the calibration factors, their function, and their location in the ce ram. again, the command line interface can be used to store the calibration fact ors in their respective ce ram addresses. for example, the command >]10=+16302 stores the decimal value 16302 in the ce ram location controlling t he gain of the current channel ( cal_ia ) for phase a. the command >]11=4005 stores the hexadecimal value 0x4005 ( decimal 16389) in the ce ram locati on controlling the gai n of the voltage channel for phase a ( cal_va ). constant ce address (hex) description cal_va cal_vb cal_vc 0x11 0x13 0x15 adjusts the gain of the voltage channels. +16384 is the typical value. the gain is directly proportional to the cal parameter. allowed range is 0 to 32767. if the gain is 1% slow, cal should be increased by 1%. cal_ia cal_ib cal_ic 0x10 0x12 0x14 adjusts the gain of the current channels. +16384 is the typical value. the gain is directly proportional to the cal parameter. allowed range is 0 to 32767. if the gain is 1% slow, cal should be increased by 1%. phadj_a phadj_b phadj_c 0x18 0x19 0x1a this constant controls the ct phase compensation. no compensation occurs when phadj=0. as phadj is increased, more compensation is introduced. table 1-5: ce ram locations for calibration constants 71m6533/71m6533h demo board user?s manual page: 26 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.9.2 calibration macro file the macro file in figure 1-6 contains a sequence of the serial interf ace commands. it is a simple text file and can be created with notepad or an equivalent ascii editor program. the file is executed with hyperterminal?s transfer->send text file command. ce0 /disable ce ]10=+16022 /cal_ia (gain=cal_ia/16384) ]11=+16381 /cal_va (gain=cal_va/16384) ]12=+16019 /cal_ib (gain=cal_ib/16384) ]13=+16370 /cal_vb (gain=cal_vb/16384) ]14=+15994 /cal_ic (gain=cal_ic/16384) ]15=+16376 /cal_vc (gain=cal_vc/16384) ]18=+115 /phadj_a (default 0) ]19=+113 /phadj_b (default 0) ]1a=+109 /phadj_c (default 0) ce1 /enable ce figure 1-6: typical calibration macro file it is possible to send the calibration macro file to the 71m6533h for ?temporary? calibra tion. this will temporarily change the ce data values. upon power up, these values are refreshed back to the default values stored in flash memory. thus, until the flash memory is updated, the macro file must be l oaded each time the part is powered up. the macro file is run by sending it with the transfer ? send text file procedure of hyperterminal. use the transfer ? send text file command! 1.9.3 updating the demo code (hex file) the d_merge program updates the hex file (usually named 6533_4p6b_19jan08.hex or similar) with the values contained in the macro file. this program is executed from a dos command line window. executing the d_merge program with no arguments will display t he syntax description. to merge macro.txt and old_6533_demo.hex into new_6533_demo. hex, use the command: d_merge old_6533_demo.hex macro.txt new_6533_demo.hex the new hex file can be written to the 71m6533/71m6533h through the ice port using the adm51 in-circuit emulator or the tfp-2 flash programmer. 1.9.4 updating calibration data in fla sh or eeprom without using the ice or the tfp-2 it is possible to make data permanent that had been entered temporarily into t he ce ram. the transfer to flash memory is done using the following serial interface command: >]u thus, after transferring calibration data with manual serial interface commands or with a macro file, all that has to be done is invoking the u command. similarly, calibration data can also st ored in eeprom using the cls command. after reset, calibration data is copied from the eeprom, if present. otherwise, calibration data is copied from the flash memory. writi ng 0xff into the first few bytes of the eeprom deactivates any calibration data pr eviously stored to the eeprom. 71m6533/71m6533h demo board user?s manual page: 27 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.9.5 automatic gains calibration the demo code is able to perform a single-point fast automatic calibration, as described in section 2.2 . this calibration is performed for channels a, b, and c only, not for the neutral channel. the steps required for the calibration are: 1. en ter operating values for voltage and current in i/o ram. the voltage is entered at mpu address 0x10 (e.g. with the command )10=+2400 for 240v), the current is ent ered at 0x11 (e.g. with the command )11=+300 for 30a) and the duration measured in accumulation intervals is entered at 0x0f. 2. the operating voltage and current defined in step 1 must be appli ed at a zero degree phase angle to the meter (demo board). 3. the clb (begin calibration) command must be entered via the serial interf ace. the operating voltage and current must be maintained accurately while the calibration is being performed. 4. the calibration procedure will autom atically reset ce addresses used to store the calibration factors to their default values prior to starting the calibra tion. automatic calibration also reads the chip temperature and enters it at the proper ce location te mperature compensation. 5. ce addresses 0x10 to 0x15 and 0x18 to 0x1a will now show the new values determined by the auto- calibration procedure. these values can be st ored in eeprom by issuing the cls command. tip: current transformers of a given type usually have very similar phase angle for identical operating conditions. if the phase angle is accurately determined for one current transformer, the corresponding phase adjustment coefficient phadj_x can be entered for all calibrated units. 1.9.6 loading the code for th e 6533 into the demo board hardware interface for programming: the 71m6533/6533h ic provides an in terface for loading code into the internal flash memory. this interfac e consists of the following signals: e_rxtx (data), e_tclk (clock), e_rst (reset), ice_e (ice enable) these signals, along with v3p3d and gnd are avail able on the emulator header s j14 and j17. production meters may be equipped with simple programming connec tors, such as the 6x1 header used for j17. programming of the flash memory r equires a specific in-circuit emul ator, the adm51 by signum systems (http//www.si gnumsystems.com) or the flash programmer (tfp -2) provided by teridian semiconductor. chips may also be programmed before they are solder ed to the board. the tgp1 gang programmer suitable for high-volume production is available from teri dian. it must be equipped with lqfp-100 sockets. in-circuit emulator: if firmware exists in the 71m6533/6533h flash memory; it has to be erased before loading a new file into memory. figure 1-7 and figure 1-8 show the emulator software active. in order to erase the flash memory, the reset button of the emulator software has to be clicked followed by the erase button (). once the flash memory is erased, the new file c an be loaded using the commands file followed by load. the dialog box shown in figure 1-8 will then appear making it possible to select the file to be loaded by clicking the browse button. once the file is sele cted, pressing the ok butt on will load the file into the flash memory of the 71m6533/6533h ic. at this point, the emulator probe (c able) can be removed. once the 71m6533/ 6533h ic is reset using the reset button on the demo board, the new code starts executing. flash programmer module (tfp-2): follow the instructions given in the user manual for the tfp-2. 71m6533/71m6533h demo board user?s manual page: 28 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 1-7: emulator window showing reset and erase buttons (see arrows) figure 1-8: emulator window showing er ased flash memory and file load menu 71m6533/71m6533h demo board user?s manual page: 29 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.9.7 the programming interface of the 71m6533/6533h flash downloader/ice interface signals the signals listed in table 1-6 are necessary for communication betw een the flash downloader or ice and the 71m6533/6533h. signal direction function ice_e input to the 71m6533/6533h ice interface is enabled when ice_e is pulled high e_tclk output from 71m6533/6533h data clock e_rxtx bi-directional data input/output e_rst bi-directional flash downloader reset (active low) table 1-6: flash programming interface signals the e_rst signal should only be driven by the flash downloader when enabling these interface signals. the flash downloader must re lease e_rst at all other times. 71m6533/71m6533h demo board user?s manual page: 30 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.10 demo code 1.10.1 demo code description the demo board is shipped preloaded with demo code revision 4.4.16 or later in the 71m6533 or 71m6533h chip. the code revision can easily be verified by entering the command >i via the serial interface (see section 1.8.1 ). check with your local teridian representative or fae for the latest revision. the demo code offers the following features: ? it pro vides basic metering functions such as pulse generation, display of accumulated energy, frequency, date/time, and enables the user to evaluat e the parameters of the metering ic such as accuracy, harmonic performance, etc. ? it maintains and provides access to basic househol d functions such as real-time clock (rtc). ? it provides access to control and display functions vi a the serial interface, enabling the user to view and modify a variety of meter parameters such as kh , calibration coefficients, temperature compensation etc. ? it provides libraries for access of low-level ic functions to serve as building blocks for code development. a detailed description of the demo code can be found in the software user ?s guide (sug). in addition, the comments contained in the library provided with t he demo kit can serve as useful documentation. the software user?s guide contains the following information: ? design guide ? design reference for routines ? tool installation guide ? list of library functions ? 80515 mpu reference (hardware, inst ruction set, memory, registers) 71m6533/71m6533h demo board user?s manual page: 31 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.10.2 important demo code mpu parameters in the demo code, certain mpu xram parameters have been given fixed addresses in order to permit easy external access. these variables can be read via the serial interface, as described in section 1.7.1, with the )n$ command and written with the )n=xx command where n is the word address. note that accumulation variables are 64 bits long and are accessed with )n$$ (read) and )n=hh=ll (write) in the case of accumulation variables. default values are the values a ssigned by the demo code on start-up. all mpu input parameters are loaded by the mpu at startup and should not need adjustment during meter calibration. mpu input parameters for metering xram word address default value name description 0x00 433199 ithrshlda for each element, if wsum_x or varsum_x of that element ex- ceeds wcreep_thr , the sample values for that element are not zeroed. otherwise, the accumulators for wh, varh, and vah are not updated and the instantaneous value of irms for that element is zeroed. 16 2 i0sqsum ? = lsb the default value is equivalent to 0.08a. setting ithrshlda to zero disables creep control. 0x01 0 config bit 0: sets va calculation mode. 0: v rms *a rms 1: 2 2 varw + bit 1: clears accumulators fo r wh, varh, and vah. this bit need not be reset. 0x02 764569660 pk_vthr when the voltage exceeds this val ue, bit 5 in the mpu status word is set, and the mpu might choose to log a warning. event logs are not implemented in demo code. 16 2 v0sqsum ? = lsb the default value is equivalent to 20% above 240vrms. 0x03 275652520 pk_ithr when the current exceeds this va lue, bit 6 in the mpu status word is set, and the mpu might choose to log a warning. event logs are not implemented in demo code. 16 2 i0sqsum ? = lsb the default value is equivalent to 20% above 30a rms . 0x04 0 y_cal_deg0 rtc adjust, 100ppb. read only at reset in demo code. 0x05 0 y_cal_deg1 rtc adjust, linear by temperature, 10ppb* t, in 0.1 ?c. provided for optional code. 0x06 0 y_cal_deg2 rtc adjust, squared by temperature, 1ppb* t 2 , in 0.1 ?c. provided for optional code. 71m6533/71m6533h demo board user?s manual page: 32 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 xram word address default value name description 0x07 0 pulsew_src this address contains a number t hat points to the selected pulse source for the wh output. select able pulse sources are listed in table 1-8 . 0x08 4 pulser_src this address contains a number t hat points to the selected pulse source for the varh output. sele ctable pulse sources are listed in table 1-8 . 0x09 6000 vmax the nominal external rms vo ltage that corresponds to 250mv peak at the adc input. the meter uses this value to convert internal quantities to external. lsb=0.1v 0x0a 2080 imax the nominal external rms curr ent that corresponds to 250mv peak at the adc input for channel a. the meter uses this value to convert internal quantitie s to external. lsb=0.1a 0x0b 0 ppmc ppm/c*26.84. linear temperatur e compensation. a positive value will cause the meter to run faster when hot. this is applied to both v and i and will therefore have a double effect on products. 0x0c 0 ppmc2 ppm/c 2 *1374. square law compensati on. a positive value will cause the meter to run faster when hot. this is applied to both v and i and will therefore have a double effect on products. 0x0d pulsex_src this address contains a number t hat points to the selected pulse source for the xpulse output. selectable pulse sources are listed in table 1-8 . 0x0e pulsey_src this address contains a number t hat points to the selected pulse source for the ypulse output. selectable pulse sources are listed in table 1-8 . 0x0f 2 scal count of accumulation intervals for auto-calibration. 0x10 2400 vcal applied voltage for auto-calibration. lsb = 0.1v rms of ac signal applied to all elements during calibration. 0x11 300 ical applied current for auto-calibration. lsb = 0.1a rms of ac signal applied to all elements during calib ration. power factor must be 1. 0x12 75087832 vthrshld voltage to be used for creep det ection, measuring frequency, zero crossing, etc. 0x13 50 pulse_width pulse width in s = (2*pulsewidt h + 1)*397. 0xff disables this feature. takes effect only at start-up. 0x14 -- temp_nom nominal (reference) temperature, i.e. the temper ature at which calibration occurred. lsb = units of temp_raw , from ce. 0x15 -- ncount the count of accumulation interval s that the neutral current must be above inthrshld required to set the ?excess neutral? error bit. 0x16 -- inthrshld the neutral current threshold. 16 2 ixsqsum ? = lsb table 1-7: mpu input parameters for metering 71m6533/71m6533h demo board user?s manual page: 33 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 any of the values listed in table 1-8 can be selected for as a source for pulsew and pulser. the designation ?source_i? refers to values imported by the consum er; ?source_e? refers to energy exported by the consumer (energy generation). number pulse source description number pulse source description 0 wsum default for pulsew_src 18 va2sum 1 w0sum 19 wsum_i sum of imported real energy 2 w1sum 20 w0sum_i imported real energy on element a 3 w2sum 21 w1sum_i imported real energy on element b 4 varsum default for pulser_src 22 w2sum_i imported real energy on element c 5 var0sum 23 varsum_i sum of imported reactive energy 6 var1sum 24 var0sum_i imported reactive energy on element a 7 var2sum 25 var1sum_i imported reactive energy on element b 8 i0sqsum 26 var1sum_i imported reactive energy on element c 9 i1sqsum 27 wsum_e sum of exported real energy 10 i2sqsum 28 w0sum_e exported real energy on element a 11 insqsum 29 w1sum_e exported real energy on element b 12 v0sqsum 30 w2sum_e exported real energy on element c 13 v1sqsum 31 varsum_e sum of exported reactive energy 14 v2sqsum 32 var0sum_e exported reactive energy on element a 15 vasum 33 var1sum_e exported reactive energy on element b 16 va0sum 34 var2sum_e exported reactive energy on element c 17 va1sum table 1-8: selectable pulse sources 71m6533/71m6533h demo board user?s manual page: 34 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 mpu instantaneous output variables the demo code processes ce outputs after each accumu lation interval. it calculates instantaneous values such as vrms, irms, w and va as well as accu mulated values such as wh, varh, and vah. table 1-9 lists the calculated instantaneous values. xram word address name description 0x24 0x26 0x28 vrms_a vrms_b* vrms_c v rms from element 0, 1, 2. 16 2 vxsqsum ? = lsb 0x25 0x27 0x29 irms_a irms_b irms_c irms_n i rms from element 0, 1, 2 or neutral 16 2 ixsqsum ? = lsb 0x20 delta_t deviation from calibration (re ference) temperature. lsb = 0.1 0 c. 0x21 frequency frequency of voltage selected by ce i nput. if the selected voltage is below the sag threshold, frequency=0. lsb hz table 1-9: mpu instantaneous output variables 71m6533/71m6533h demo board user?s manual page: 35 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 mpu status word the mpu maintains the status of certain meter and i/o relat ed variables in the status word. the status word is located at address 0x21. the bit assignments are listed in table 1-10 . status word bit name description 0 creep indicates that all elements are in creep mode. the ce?s pulse variables will be ?jammed? with a constant value on every accumulation interval to prevent spurious pulses. note t hat creep mode therefore halts pulsing even when the ce?s pulse mode is ?internal?. 1 minvc element c has a voltage below vthrshld. this forces that element into creep mode. 2 pb_press a push button press was recorded at the most recent reset or wake from a battery mode. 3 spurious an unexpected interr upt was detected. 4 minvb element b has a voltage below vthrshld. this forces that element into creep mode. 5 maxva element a has a voltage above vthrshldp. 6 maxvb element b has a voltage above vthrshldp. 7 maxvc element c has a voltage above vthrshldp. 8 minva element a has a voltage below vthrshld. this forces that element into creep mode. it also forces the frequency and main edge count to zero. 9 wd_detect the most recent reset was a watchdog reset. this usually indicates a software error. 10 maxin the neutral current is over inthrshld. in a real meter this could indicate faulty distribution or tampering. 11 maxia the current of element a is over ithrshld. in a real meter this could indicate overload. 12 maxib the current of element b is over ithrshld. in a real meter this could indicate overload. 13 maxic the current of element c is over ithrshld. in a real meter this could indicate overload. 14 mint the temperature is below the minimu m, -40c, established in option_gbl.h. this is not very accurate in the demo code, because the calibration temperature is usually poorly cont rolled, and the default temp_nom is usually many degrees off. ?40c is the minimum recommended operating temperature of the chip. 15 maxt the temperature is above the maximu m, 85c, established in option_gbl.h. this is not very accurate in the demo code, because the calibration temperature is usually poorly cont rolled, and the default temp_nom is usually many degrees off. 85c is the maximum recommended operating temperature of the chip. 71m6533/71m6533h demo board user?s manual page: 36 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 status word bit name description 16 battery_bad just after midnight, the demo code sets this bit if vbat < vbatmin. the read is infrequent to reduce battery loading to very low values. when the battery voltage is being displayed, the read occurs every second, for up to 20 seconds. 17 clock_tamper clock set to a new value more than two hours from the previous value. 18 cal_bad set after reset when the read of the calibration data has a bad longitudinal redundancy check or read failure. 19 clock_unset set when the clock?s current reading is a) more than a year after the previously saved reading, or b) earlie r than the previously saved reading, or c) there is no previously saved reading. 20 power_bad set after reset when the read of the power regist er data has a bad longitudinal redundancy check or read failu re in both copies. two copies are used because a power failure can o ccur while one of the copies is being updated. 21 gndneutral indicates that a grounded neutral was detected. 22 tamper tamper was detected ?** 23 software a software defect was detected. 25 saga element a has a sag condition. this bit is set in real time by the ce and detected by the ce_busy in terrupt (ce_busy_isr() in ce.c) within 8 sample intervals, about 2.6ms. a transition from normal operation to saga causes the power registers to be saved, because the demo pcb is powered from element a. 26 sagb element b has a sag condition. this bit is set in real time by the ce and detected by the ce_busy in terrupt (ce_busy_isr() in ce.c) within 8 sample intervals, about 2.6ms. 27 sagc? element c has a sag condition. see t he description of the other sag bits. 28 f0_ce a square wave at the line frequency, with a jitter of up to 8 sample intervals, about 2.6ms. 31 one_sec changes each accumulation interval. table 1-10: mpu status word bit assignment 71m6533/71m6533h demo board user?s manual page: 37 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 mpu accumulation output variables accumulation values are accumulated from xfer cycle to xfer cycle (see table 1-11 ). they are organized as two 32-bit registers. the first register stores the decimal number displayed on the lcd. for exam ple, if the lcd shows ?001.004?, the value in the firs t register is 1004. this register wraps around after the value 999999 is reached. the second register hol ds fractions of the accumu lated energy, with an lsb of 9.4045*10 -13 *vmax*imax*in_8 wh. the mpu accumulation registers always hold positive values. the cli commands with two question marks, e.g. )39?? should be used to read the variables. xram word address name description 0x2c whi total watt hours consumed (imported) 0x44 whe total watt hours generated (exported) 0x34 varhi total var hours consumed 0x4c varhe total var hours generated (inverse consumed) 0x3c vah total va hours 0x2e whi_a total watt hours consumed through element 0 0x46 whe_a total watt hours generated (inverse consumed) through element 0 0x36 varhi_a total var hours consumed through element 0 0x4e varhe_a total var hours generated (inverse consumed) through element 0 0x3e vah_a total va hours in element 0 0x30 whi_b total watt hours consumed through element 1 0x48 whe_b total watt hours generated (inverse consumed) through element 1 0x38 varhi_b total var hours consumed through element 1 0x50 varhe_b total var hours generated (inverse consumed) through element 1 0x40 vah_b total va hours in element 1 0x32 whi_c total watt hours consumed through element 2 0x4a whe_c total watt hours generated (inverse consumed) through element 2 0x3a varhi_c total var hours consumed through element 2 0x52 varhe_c total var hours generated (inverse consumed) through element 2 0x42 vah_c total va hours in element 2 table 1-11: mpu accumulation output variables 71m6533/71m6533h demo board user?s manual page: 38 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 1.10.3 useful cli commands involving the mpu and ce table 1-12 shows a few essential commands involving data memory. command description )1=2 clears the accumulators for wh, var h, and vah by setting bit 1 of the config register. )a=+2080 applies the value 208a to the imax register )9=+6000 applies the value 600v to the vmax register )2f?? displays the total accumulated imported wh energy mr2.1 displays the current rms voltage in phase a mr1.2 displays the current rms current in phase b ri5=26 disables the emulator clock by setting bit 5 in i/o ram address 0x05. this command will disable emulator/programmer access to the 71m6533. ri5=6 re-enables the emulator clock by clearing bit 5 in i/o ram address 0x05. ]u stores the current ce ram variables to flash memory. the variables stored in flash memory will be applied by the mpu at the next reset or pow er-up if no valid data is available from the eeprom. table 1-12: cli commands for data memory 71m6533/71m6533h demo board user?s manual page: 39 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2 2 application information 2.1 calibration theory a typical meter has phase and gain errors as shown by s , a xi , and a xv in figure 2-1 . following the typical meter convention of current phase being in the lag direction, the small amount of phase lead in a typical current sensor is represented as - s . the errors shown in figure 2-1 represent the sum of all gain and phase errors. they include errors in voltage attenuat ors, current sensors, and in adc gai ns. in other words, no errors are made in the ?input? or ?meter? boxes. i v l input ? s a xi a xv errors ) cos( l i v i deal = ) cos( s l x v x i a a iv a ctual ? = 1 ? = ? i deal a ctual i deal i deal a ctual e rror w i rms meter v rms x i a i a ctual i i deal = = , x v a v a ctual v i deal = = , l is phase lag s is phase lead figure 2-1: watt meter with gain and phase errors. during the calibration phase, we measur e errors and then introduce correction fa ctors to nullify their effect. with three unknowns to determine, we must make at least th ree measurements. if we make more measurements, we can average the results. 2.1.1 calibration with three measurements the simplest calibration method is to make three measurements. typically, a voltage measurement and two watt-hour (wh) measurements are m ade. a voltage display can be obtained for test purposes via the command >mr2.1 in the serial interface. let?s say the voltage meas urement has the error e v and the two wh measurements have errors e 0 and e 60 , where e 0 is measured with l = 0 and e 60 is measured with l = 60. these values should be simple ratios?not percentage values. they should be zero when the meter is accurate and negative when the meter runs slow. the fundamental frequency is f 0 . t is equal to 1/f s , where f s is the sample frequency (2560.62hz). set all calibration factors to nominal: cal_ia = 16384, cal_va = 16384, phadja = 0. 71m6533/71m6533h demo board user?s manual page: 40 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 from the voltage measurem ent, we determine that 1. ? 1 += v xv ea we use the other two measurements to determine s and a xi . 2. 1)cos( 1 )0cos( )0cos( 0 ? =? ? = s xixv s xixv aa iv aaiv e 2a. )cos( 1 0 s xixv e aa + = 3. 1 )60cos( )60cos( 1 )60cos( )60cos( 60 ? ? =? ? = s xixv s xixv aa iv aaiv e 3a. [] 1 )60cos( )sin()60sin()cos()60cos( 60 ? + = s s xixv aa e 1)sin()60tan( )cos( ? + = s xixv s xixv aa aa combining 2a and 3a: 4. )tan()60tan()1( 0060 s eee ++= 5. )60tan()1( )tan( 0 060 + ? = e ee s 6. ? ? ? ? ? ? ? ? ? + ? = ? )60tan()1( tan 0 060 1 e ee s and from 2a: 7. ? )cos( 1 0 s xv xi a e a + = now that we know the a xv , a xi , and s errors, we calculate the new calibra tion voltage gain coefficient from the previous ones: xv new a vcal vcal _ _ = we calculate phadj from s , the desired phase lag: [] [] ? ? ? ? ? ? ??? ? ???+ = ? ? ? ? )2cos()21(1)tan()2sin()21( )2cos()21(2)21(1)tan( 2 0 9 0 9 0 9 29 20 tf tf tf phadj s s 71m6533/71m6533h demo board user?s manual page: 41 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 and we calculate the new calibration current gain coeffi cient, including compensation for a slight gain increase in the phase calibration circuit. 29 0 9 0 9 20 20 )21()2cos()21(21 ))2cos()21(2 22( 2 1 1 _ _ ? ? ? ? ? ?+ ?? ?? + + = tf tf phadj phadj a ical ical xi new 2.1.2 calibration with five measurements the five measurement method provi des more orthogonality between the gai n and phase error derivations. this method involves measuring e v , e 0 , e 180 , e 60 , and e 300 . again, set all calibration factors to nominal, i.e. cal_ia = 16384, cal_va = 16384, phadja = 0. first, calculate a xv from e v : 1. ? 1 += v xv ea calculate a xi from e 0 and e 180 : 2. 1)cos( 1 )0cos( )0cos( 0 ? =? ? = s xixv s xixv aa iv aaiv e 3. 1)cos( 1 )180cos( )180cos( 180 ? =? ? = s xixv s xixv aa iv aaiv e 4. 2)cos( 2 1800 ? =+ s xixv aaee 5. )cos(2 2 1800 s xixv ee aa ++ = 6. ? )cos( 12)( 1800 s xv xi a ee a ++ = use above results along with e 60 and e 300 to calculate s . 7. 1 )60cos( )60cos( 60 ? ? = iv aaiv e s xixv 1)sin()60tan( )cos( ? + = s xixv s xixv aa aa 8. 1 )60cos( )60cos( 300 ? ? ?? = iv aaiv e s xixv 1)sin()60tan( )cos( ? ? = s xixv s xixv aa aa subtract 8 from 7 9. )sin()60tan( 2 300 60 s xixv aaee =? use equation 5: 71m6533/71m6533h demo board user?s manual page: 42 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 10. )sin()60tan( )cos( 2 1800 300 60 s s ee ee ++ =? 11. )tan()60tan()2 ( 1800 300 60 s eeee ++=? 12. ? ? ? ? ? ? ? ? ? ++ ? = ? )2 )(60tan( )( tan 1800 300 60 1 ee ee s now that we know the a xv , a xi , and s errors, we calculate the new calibra tion voltage gain coefficient from the previous ones: xv new a vcal vcal _ _ = we calculate phadj from s , the desired phase lag: [] [] ? ? ? ? ? ? ??? ? ???+ = ? ? ? ? )2cos()21(1)tan()2sin()21( )2cos()21(2)21(1)tan( 2 0 9 0 9 0 9 29 20 tf tf tf phadj s s and we calculate the new calibration current gain coeffi cient, including compensation for a slight gain increase in the phase calibration circuit. 29 0 9 0 9 20 20 )21()2cos()21(21 ))2cos()21(2 22( 2 1 1 _ _ ? ? ? ? ? ?+ ?? ?? + + = tf tf phadj phadj a ical ical xi new 2.2 calibration procedures calibration requires that a calibration sy stem is used, i.e. equi pment that applies accurate voltage, load current and load angle to the unit being calibrated, while measur ing the response from the unit being calibrated in a repeatable way. by repeatable we m ean that the calibration system is synchronized to the meter being calibrated. best results are achiev ed when the first pulse from the mete r opens the measurement window of the calibration system. this mode of operation is opposed to a calibrator that opens t he measurement window at random time and that therefore may or may not catch certain pulses emitted by the meter. it is essential for a valid meter calibration to have the voltage stabilized a few seconds before the current is applied. this enables the demo code to initialize the 71m6533/6533h and to stabilize the plls and filters in the ce. this method of operation is consistent with meter applications in the field as well as with metering standards. each meter phase must be calibrated individually. the pr ocedures below show how to calibrate a meter phase with either three or five measurements. the phadj equations apply only when a current transformer is used for the phase in question. note t hat positive load angles corre spond to lagging current (see figure 2-2 ). during calibration of any phase, a stable mains voltage has to be present on phase a . this enables the ce processing mechanism of the 71m6533/6533h necessary to obtain a stable calibration. 71m6533/71m6533h demo board user?s manual page: 43 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 voltage current +60 using energy generating energy current lags voltage (inductive ) current leads voltage (capacitive ) -60 positive direction voltage figure 2-2: phase angle definitions the calibration procedures described below should be follo wed after interfacing the voltage and current sensors to the 71m6533/6533h chip. when properly interfaced, the v3p3 power s upply is connected to the meter neutral and is the dc reference for each input. each voltage and current waveform, as seen by the 71m6533/6533h, is scaled to be less than 250mv (peak). 2.2.1 calibration procedure with three measurements each phase is calibrated individually. the calibration procedure is as follows: 1) th e calibration factors for all phases are reset to their default values, i.e. cal_in = cal_vn = 16384, and phadj_n = 0. 2) an rms voltage v ideal consistent with the meter?s nominal voltage is applied, and the rms reading v actual of the meter is recorded. the vo ltage reading error axv is determined as axv = (v actual - v ideal ) / v ideal 3) apply the nominal load current at phase angles 0 and 60, measur e the wh energy and record the errors e 0 and e 60 . 4) calculate the new calibration factors cal_in , cal_vn, and phadj_n , using the formulae presented in section 2.1.1 or using the spreadsheet presented in section 2.2.4 . 5) apply the new calibration factors cal_in , cal_vn , and phadj_n to the meter. the memory locations for these factors are given in section 1.9.1 . 6) test the meter at nominal current and, if desired, at lower and higher currents and various phase angles to confirm the desired accuracy. 7) store the new calibration factors cal_in , cal_vn , and phadj_n in the eeprom memory of the meter. if the calibration is performed on a teridi an demo board, the methods involving the command line interface, as shown in sections 1.9.3 and 1.9.4 , can be used. 8) repeat the steps 1 through 7 for each phase. 9) for added temperature com pensation, read the value temp_raw (ce ram) and write it to temp_nom (ce ram). if demo code 4.6n or later is us ed, this will automatic ally calculate the correction coefficients ppmc and ppmc2 from the nom inal temperature and from the characterization data contained in the on-chip fuses. tip: step 2 and the energy measurement at 0 of step 3 can be combined into one step. 71m6533/71m6533h demo board user?s manual page: 44 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.2.2 calibration procedure with five measurements each phase is calibrated individually. the calibration procedure is as follows: 1) the calibration factors for all phases are reset to their default values, i.e. cal_in = cal_vn = 16384, and phadj_n = 0. 2) an rms voltage v ideal consistent with the meter?s nominal voltage is applied, and the rms reading v actual of the meter is recorded. the vo ltage reading error axv is determined as axv = (v actual - v ideal ) / v ideal 3) apply the nominal load current at phase angles 0, 60, 180 and ?60 (-300). measure the wh energy each time and record the errors e 0 , e 60 , e 180 , and e 300 . 4) calculate the new calibration factors cal_in , cal_vn, and phadj_n , using the formulae presented in section 2.1.2 or using the spreadsheet presented in section 2.2.4 . 5) apply the new calibration factors cal_in , cal_vn , and phadj_n to the meter. the memory locations for these factors are given in section 1.9.1 . 6) test the meter at nominal current and, if desired, at lower and higher currents and various phase angles to confirm the desired accuracy. 7) store the new calibration factors cal_in , cal_vn , and phadj_n in the eeprom memory of the meter. if a demo board is calibrated, the met hods involving the command line interface shown in sections 1.9.3 and 1.9.4 can be used. 8) repeat the steps 1 through 7 for each phase. 9) for added temperature com pensation, read the value temp_raw (ce ram) and write it to temp_nom (ce ram). if demo code 4.6n or later is us ed, this will automatic ally calculate the correction coefficients ppmc and ppmc2 from the nom inal temperature and from the characterization data contained in the on-chip fuses. tip: step 2 and the energy measurement at 0 of step 3 can be combined into one step. 2.2.3 calibration procedure for rogowski coil sensors demo code containing ce code that is compatible with rogowski coils is available from teridian semi- conductor. rogowski coils generate a signal that is the derivative of the current. the ce code implemented in the rogowski ce image digitally compensates for this effect and has the usual gain and phase calibration adjustments. additionally, calibration adjustments are provided to eliminat e voltage coupling from the sensor input. current sensors built from rogowski coils have a relatively high output impedance that is susceptible to capacitive coupling from the large vo ltages present in the meter. the most dominant coupling is usually capacitance between the prim ary of the coil and the coil?s output. th is coupling adds a component proportional to the derivative of voltage to the sensor output. this effect is co mpensated by the voltage coupling calibration coefficients. as with the ct procedure, the calibra tion procedure for rogowski sensors uses the meter?s display to calibrate the voltage path and the pulse outputs to perform the remaining energy calibrations. the calibration procedure must be done to each phase separately, ma king sure that the pulse generator is driven by the accumulated real energy for just that phase. in other words, the pulse generator input s hould be set to wha, whb, or whc, depending on the phase being calibrated. in preparation of the calibration, all calibrati on parameters are set to their default values. vmax and imax are set to reflect the system design parameters. wrate and puse_slow, pulse_fast are adjusted to obtain the desired kh. 71m6533/71m6533h demo board user?s manual page: 45 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 step 1: basic calibration : after making sure vfeed_a , vfeed_b , and vfeed_c are zero, perform either the three measurement procedure ( 2.2.1 ) or the five measurem ent calibration procedure ( 2.2.2 ) described in the ct section. perform the procedure at a current large enough that energy readings are immune from voltage coupling effects. the one exception to the ct procedure is the equation for phadj?after the phase error, s, has been calculated, use the phadj equation shown below. note that the default val ue of phadj is not zero, but rather ? 3973. 0 50 1786 f phadj phadj s previous ? = if voltage coupling at low currents is introducing unacceptable errors, perfo rm step 2 below to select non-zero values for vfeed_a , vfeed_b , and vfeed_c . step 2: voltage cancellation: select a small current, i rms , where voltage coupling introduces at least 1.5% energy error. at this current, measure the errors e 0 and e 180 to determine the coefficient vfeed . previous rms max max rms vfeed vi viee vfeed ? ? = 25 1800 2 2 2.2.4 calibration spreadsheets calibration spreadsheets are available from teridian semiconductor. they are also included in the cd-rom shipped with any demo kit. figure 2-3 shows the spreadsheet fo r three measurements. figure 2-4 shows the spreadsheet for five measurements with three phases. for ct and shunt calibration, data should be enter ed into the calibration spreadsheets as follows: 1. ca libration is performed one phase at a time. 2. results from measurements ar e generally entered in the yellow fields. intermediate results and calibration factors will show in the green fields. 3. the line frequency used (50 or 60hz0 is ent ered in the yellow field labeled ac frequency. 4. after the voltage measurement, measured (observed) and expected (actually applied) voltages are entered in the yellow fields l abeled ?expected voltage? and ?measur ed voltage?. the error for the voltage measurement will then show in t he green field above the two voltage entries. 5. the relative error from the energy measurements at 0 and 60 are entered in the yellow fields labeled ?energy reading at 0? and ?energy reading at 60?. the corresponding e rror, expressed as a fraction will then show in the two green fields to the right of the energy reading fields. 6. the spreadsheet will calculat e the calibration factors cal_ia, cal_va, and phadj_a from the information entered so far and display them in t he green fields in the column underneath the label ?new?. 7. if the calibration was performed on a meter with non-default calibration factor s, these factors can be entered in the yellow fields in t he column underneath the label ?old?. for a meter with default calibration factors, the ent ries in the column underneath ?old? should be at the default value (16384). 71m6533/71m6533h demo board user?s manual page: 46 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 a spreadsheet is also available for rogowski coil calibration (see figure 2-5 ). data entry is as follows: 1. all nominal values are enter ed in the fields of step one. 2. the applied voltage is entered in the yellow field labeled ?input voltage app lied? of step 2. the entered value will automatically show in t he green fields of the two other channels. 3. after measuring the voltages di splayed by the meter, these are entered in the yellow fields labeled ?measured voltage?. the spreadsheet will show the calculated calibra tion factors for voltage in the green fields labeled ?cal_vx?. 4. t he default values (-3973) for phadj_x are entered in the yellow fields of step 3. if the calibration factors for the current are not at default, their values are entered in the fields labeled ?old cal_ix?. 5. th e errors of the energy meas urements at 0, 60, -60, and 180 are entered in the yellow fields labeled ?% error ??. the spreadsheet will then disp lay phase error, the current calibration factor and the phadj_x factor in the green fields, one for each phase. 6. if a crosstalk measurement is necessary, it s hould be performed at a low current, where the effects of crosstalk are noticeable. first, if (old) values for vfeedx exist in the meter, they are entered in the spreadsheet in the row labeled ?old vfeedx? , one for each phase. if these factors are zero, ?0? is entered for each phase. 7. test current and test vo ltage are entered in the yellow fields labeled vrms and irms. 8. the crosstalk measurement is now conducted at a low current with phase angles of 0 and 180, and the percentage errors ar e entered in the yellow fields labeled ?% error, 0 deg? and ?% error, 180 deg?, one pair of values for each phase. the re sulting vfeedx factors are then displayed in the green fields labeled vfeedx. 71m6533/71m6533h demo board user?s manual page: 47 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 71m6511/71m6513/71m6515 calibration worksheet enter values in yellow fields rev 4.2 results will show in green fields? date: 10/25/2005 ac frequency: 50 [hz] author: wjh (click on yellow field to se lect from pull-down list) phase a %fraction old new energy reading at 0 0 0 cal_ia 16384 16384 energy reading at +60 0 0 cal_va 16384 16384 voltage error at 0 0 0 phadj_a 0 expected voltage 240 [v] measured voltage 240 [v] phase b %fraction old new energy reading at 0 10 0.1 cal_ib 16384 16384 energy reading at +60 10 0.1 cal_vb 16384 14895 voltage error at 0 10 0.1 phadj_b 0 expected voltage 240 [v] measured voltage 264 [v] phase c %fraction old new energy reading at 0 -3.8 -0.038 cal_ic 16384 16409 energy reading at +60 -9 -0.09 cal_vc 16384 17031 voltage error at 0 -3.8 -0.038 phadj_c -5597 readings: enter 0 if the error is 0%, expected voltage 240 [v] enter -3 if meter runs 3% slow. measured voltage 230.88 [v] three measurements voltage current +60 using energy generating energy current lags voltage (inductive ) current leads voltage (capacitive ) -60 positive direction voltage figure 2-3: calibration spreadsheet for three measurements 71m6511/71m6513/71m6515 calibration worksheet five measurements pi 0.019836389 rev 4.2 ts date: 10/25/2005 ac frequency: 50 [hz] author: wjh (click on yellow field to select from pull-down list) phase a %fraction old new energy reading at 0 2 0.02 cal_ia 16384 16220 energy reading at +60 2.5 0.025 cal_va 16384 16222 energy reading at -60 1.5 0.015 phadj_a 371 energy reading at 180 2 0.02 voltage error at 0 1 0.01 expected voltage [v] 240 242.4 measured voltage [v] phase b %fraction old new energy reading at 0 2 0.02 cal_ib 16384 16223 energy reading at +60 2 0.02 cal_vb 16384 16222 energy reading at -60 2 0.02 phadj_b 0 energy reading at 180 2 0.02 voltage error at 0 1 0.01 expected voltage [v] 240 242.4 measured voltage [v] phase c %fraction old new energy reading at 0 0 0 cal_ic 16384 16384 energy reading at +60 0 0 cal_vc 16384 16384 energy reading at -60 0 0 phadj_c 0 readings: enter 0 if the error is 0%, energy reading at 180 0 0 enter +5 if meter runs 5% fast, voltage error at 0 0 0 enter -3 if meter runs 3% slow. expected voltage [v] 240 240 measured voltage [v] results will show in green fields? enter values in yellow fields! voltage current +60 using energy generating energy current lags voltage (inductive ) current leads voltage (capacitive ) -60 positive direction voltage figure 2-4: calibration spreadsheet for five measurements 71m6533/71m6533h demo board user?s manual page: 48 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 calibration procedure for rogowski coils enter values in yellow fields! results will show in green fields? step 1: enter nominal values: nominal cal_v 16384 resulting nominal rev 4.3 nominal cal_i 16384 values: x 6 date: 11/18/2005 phadj -3973 kh (wh) 0.440 author: wjh wrate 179 vmax 600 calibration frequency [hz] 50 angle sensitivity (deg/lsb) imax (incl. ishunt) 30.000 50hz 5.60e-04 pulse_fast -1 1 1 50 32768 pulse_slow -1 1 -1 60 -32768 nacc 2520 step 2: vrms calibration: phase a phase b phase c enter old cal_va 16384 16384 16384 input voltage applied 240 240 240 measured voltage 235.612 236.55 234.72 cal_vx 16689 16623 16753 step 3: current gain and phase calibration deg/ct 5.60e-04 phase a phase b phase c old phadj -3973 -3973 -3973 old cal_ix 16384 16384 16384 %error, 60 -3.712 -3.912 -5.169 %error, -60 -3.381 -2.915 -4.241 %error, 0 -3.591 -3.482 -4.751 %error, 180 -3.72 -3.56 -4.831 phase error () 0.0547319 0.1647659 0.1533716 phadj -4070.74 -4267.22 -4246.88 cal_ix 17005.641 16981.934 17208.457 step 4: crosstalk calibration (equalize gain for 0 and 180) vrms 240 irms 0.30 phase a phase b phase c old vfeedx 0 0 0 % error, 0deg 1.542 1.61 1.706 %error, 180deg -1.634 -1.743 -1.884 vfeedx -13321 -14064 -15058 1. rogowski coils have significant crosstalk from voltage to current. this contributes to gain and phase errors. 2. therefore, before calibrating a rogowski meter, a quick 0 load line should be run to determine at what current the crosstalk contributes at least 1% error. 3. crosstalk calibration should be performed at this current or lower. 4. if crosstalk contributes an e0 error at current ix, there will be a 0.1% error in e60 at 15*ix. figure 2-5: calibration spreadsheet for rogowski coil 71m6533/71m6533h demo board user?s manual page: 49 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.2.5 compensating fo r non-linearities nonlinearity is most noticeable at low currents, as shown in figure 2-6 , and can result from input noise and truncation. nonlinearities can be eliminated using the quant variable. 0 2 4 6 8 10 12 0 . 111 01 0 0 i [a] error [%] error figure 2-6: non-linearity caused by quantification noise the error can be seen as the presence of a virtual constant noise curr ent. while 10ma hardly contribute any error at currents of 10a and above, the noi se becomes dominant at small currents. the value to be used for quant can be determined by the following formula: lsbimax vmax iv error quant ?? ? ?= 100 where error = observed error at a given voltage (v) and current (i), vmax = voltage scaling factor, as described in section 1.8.3 , imax = current scaling factor , as described in section 1.8.3 , lsb = quant lsb value = 7.4162*10 -10 w example: assuming an observed error as in figure 2-6 , we determine the error at 1a to be +1%. if vmax is 600v and imax = 208a, and if the measurement was taken at 240v, we determine quant as follows: 11339 104162.7208600 1240 100 1 10 ?= ??? ? ?= ? quant quant is to be written to the ce location 0x2f. it does not matter which current value is chosen as long as the corresponding error value is significant (5% error at 0.2a used in the above equat ion will produce the same result for quant ). input noise and truncation can cause si milar errors in the var calculati on that can be eliminated using the quant_var variable. quant_var is determined using the same formula as quant . 71m6533/71m6533h demo board user?s manual page: 50 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.3 power saving measures in many cases, especially when oper ating the teridian 71m 6533/71m6533h from a battery, it is desirable to reduce the power consumed by the chip to a minimum. this can be achieved with the measures listed in table 2-1 . power saving measure software control typical savings disable the ce ce_en = 0 0.16ma disable the adc adc_dis = 1 1.8ma disable clock test output cktest ckoutdis = 1 0.6ma disable emulator clock eck_dis = 1 0.1ma disable rtm outputs rtm_en = 0 0.01ma disable ssi output ssi_en = 0 select dgnd for the multiplexer input tmux[3:0] = 0 disable reference voltage output vref_dis = 1 reduce the clock for the mpu mpu_div = 5 0.4ma table 2-1: power saving measures 71m6533/71m6533h demo board user?s manual page: 51 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.4 schematic information in this section, hints on proper schem atic design are provided t hat will help designing circui ts that are functional and sufficiently immune to emi (electromagnetic interference). 2.4.1 components for the v1 pin the v1 pin of the 71m6533/6533h can never be left unconnected. a voltage divider should be used to establish that v1 is in a safe range when the meter is in mission mode (v1 must be lower than 2.9v in all cases in order to keep the hardware watchdog timer enabled). for proper debugging or loading code into the 71m6533/ 6533h mounted on a pcb, it is nece ssary to have a provision like the header jp1 shown above r1 in figure 2-7 . a shorting jumper on this header pulls v1 up to v3p3 disabling the hardware watchdog timer. v3p3 r 2 r 1 v1 r 3 5k ? c 1 100pf gnd v3p3 r 2 r 1 r 3 5k ? v1 c 1 100pf gnd figure 2-7: voltage divider for v1 on the d6533t14a3 demo board this f eature is implemented with resistors r83/r86, capacit or c31 and tp10. see the board schematics in the appendix for details. 2.4.2 reset circuit even though a functional meter will not necessarily need a reset switch, the 71m6533 demo boards provide a reset pushbutton that can be used w hen prototyping and debugging software (see figure 2-8 ).. for a production meter, the reset pin should be pulled down hard to gndd. r 1 reset 71m6533 dgnd v3p3d vbat/ v3p3d r 2 reset switch 1k ? 1nf 10k ? r 1 reset 71m6533 dgnd v3p3d vbat/ v3p3d r 2 reset switch 1k ? 1nf 10k ? figure 2-8: external components for resetz 71m6533/71m6533h demo board user?s manual page: 52 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.4.3 oscillator the oscillator of the 71m6533 drives a standard 32.768khz watch crystal (see figure 2-9 ). crystals of this type are accurate and do not require a high current osc illator circuit. the oscillator in the 71m6533 has been designed specifically to handle watch crystals and is compatible with their high impedance and limited power handling capability. the oscillator power dissipation is very low to maximize the lifetime of any battery backup device attached to the vbat pin. crystal xout xin 71m6533 33pf 15pf 71m6533 crystal xout xin 33pf 15pf figure 2-9: oscillator circuit it is not necessary to place an external resistor across the crystal 2.4.4 eeprom eeproms should be connected to the pins dio4 and dio5 (see figure 2-10 ). these pins can be switched from regular dio to implement an i2c interface by setting the i/o ram register dio_eex (0x2008[4]) to 1. pull-up resistors of 3k must be provided for both the scl and sda signals. dio4 dio5 71m6533 eeprom scl sda v3p3d 10k ? 10k ? dio4 dio5 71m6533 eeprom scl sda v3p3d 10k ? 10k ? figure 2-10: eeprom circuit 71m6533/71m6533h demo board user?s manual page: 53 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.4.5 lcd the 71m6533 has an on-chip lcd controller capable of controlling static or multiplexed lcds. figure 2-11 shows the basic connection for lcds. note that the lcd module itself has no power connection. segments 71m6533 lcd commons segments 71m6533 lcd commons figure 2-11: lcd connections 2.4.6 optical interface the 71m6533 ic is equipped with two pins supporting t he optical interface: opt_tx and opt_rx. the opt_tx pin can be used to drive a visual or ir light led with up to 20ma, a series resistor (r 2 in figure 2-12 ) helps limiting the current). the opt_rx pin can be connected to the collector of a photo-transistor, as shown in figure 2-12 . opt_tx opt_rx r 2 r 1 v3p3sys 71m6533 v3p3sys phototransistor led 10k ? 100pf opt_tx opt_rx r 2 r 1 71m6533 v3p3sys phototransistor led 10k ? 100pf opt_tx opt_rx r 2 r 1 71m6533 v3p3sys phototransistor led 10k ? 100pf opt_tx opt_rx r 2 r 1 v3p3sys 71m6533 10k ? 100pf v3p3sys phototransistor led figure 2-12: optical interface block diagram the ir diode should be connected between terminal 2 of header j12 on the demo board (cathode) and the v3p3 voltage (anode), which is accessible at terminal 1 of header j12 (see figure 3). j12 on the d6533t14a3 demo boards has all the provisions for connecti ng the ir led and photo-transistor. 71m6533/71m6533h demo board user?s manual page: 54 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.5 testing the demo board this section will explain how the 71m6533/6533h ic and t he peripherals can be tested. hints given in this section will help evaluating the f eatures of the demo board and under standing the ic and its peripherals. 2.5.1 functional meter test this is the test that every demo board has to pass before being integrated into a demo kit. before going into the functional meter test, the demo board has already passed a series of bench-top tests, but the functional meter test is the first test that applies realistic high voltages (and current signals from current transformers) to the demo board. figure 2-13 shows a meter connected to a typical calibration system. the calibrator supplies calibrated voltage and current signals to the meter. it s hould be noted that the current flows th rough the ct or ct s that are not part of the demo board. the demo board rather receives the voltage out put signals from the ct. an optical pickup senses the pulses emitted by the meter and reports them to the calibrator. some calibration systems have electrical pickups. the calibrator measures the ti me between the pulses and com pares it to the expected time, based on the meter kh and the applied power. calibrator ac voltage current ct meter under test optical pickup for pulses calibrated outputs pulse counter pc figure 2-13: meter with calibration system teridian demo boards are not calib rated prior to shipping. however, the demo board pulse outputs are tested and compared to the ex pected pulse output rate. figure 2-14 shows the screen on the controlling pc for a typical demo board. the error numbers are given in per cent. this means that for the measured demo board, the sum of all errors resulting from tolerances of pcb components, cts, and 71m6533/6533h tolerances was ? 3.41%, a range that can easily be compensated by calibration. figure 2-15 shows a load-line obtained with a 6533 in different ial mode. as can be s een, dynamic ranges of 10,000:1 for current can be achieved with good circuit design, layout, cabling, and, of course, good current sensors. 71m6533/71m6533h demo board user?s manual page: 55 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 2-14: calibration system screen load line in differential mode -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0.2 0.01 0.1 1 10 100 1000 i [a] error [%] error(%) figure 2-15: load line in differential mode at room temperature 71m6533/71m6533h demo board user?s manual page: 56 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.5.2 eeprom testing the eeprom provided on the demo board is straightforward and can be done using the serial command line interface (cli) of the demo code. to write a string of text characters to the eeprom and read it back, we apply the following sequence of cli commands: >eec1 enables the eeprom >eesthis is a test writes text to the buffer >eet80 writes buffer to address 80 written to eeprom address 00000080 74 68 69 73 20 69 73 20 61 ?. response from demo code >eer80.e reads text from the buffer read from eeprom address 00000080 74 68 69 73 20 69 73 20 61 ?. response from demo code >eec0 disables the eeprom 2.5.3 rtc testing the rtc inside the 71m6533/6533h ic is straightforward and can be done using the serial command line interface (cli) of the demo code. to set the rtc and check the time and date, we apply the following sequence of cli commands: >m10 lcd display to show calendar date >rtd05.09.27.3 sets the date to 9/27/2005 (tuesday) >m9 lcd display to show time of day >rtt10.45.00 sets the time to 10:45:00. am/p m distinction: 1:22:33pm = 13:22:33 2.5.4 hardware watchdog timer the hardware watchdog timer of the 71m6533/6533h is disabled when the volt age at the v1 pin is at 3.3v (v3p3). on the demo boards, this is done by plugging in a jumper at tp10 between the v1 and v3p3 pins. programming the flash memory or emulation using the adm51 in-circuit-emulator can only be done when a jumper is plugged in at tp10 between v1 and v3p3. conversely, removing the jumper at tp 10 will enable the hardware watchdog timer. 2.5.5 lcd various tests of the lcd interfac e can be performed with the demo b oard, using the serial command line interface (cli): 71m6533/71m6533h demo board user?s manual page: 57 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 setting the lcd_en register to 1 enables the display outputs. register name address [bits] r/w description lcd_en 2021[5] r/w enables the lcd display. when disabled, vlc2, vlc1, and vlc0 are ground as are the com and seg outputs. to access the lcd_en register, we apply the following cli commands: >ri21$ reads the hex value of register 0x2021 >25 response from demo code indicating the bit 5 is set >ri21=5 writes the hex value 0x05 to register 0x 2021 causing the display to be switched off >ri21=25 sets the lcd_en register back to normal the 71m6533/6533h provides a charge pump capable of boosting the 3.3v dc supply voltage up to 5.0vdc. the boost circuit is enabled with the lcd_bsten register. the 6533 demo boards have the boost circuit enabled by default. register name address [bits] r/w description lcd_bsten 2020[7] r/w enables the lcd voltage boost circuit. to disable the lcd voltage boost circuit, we apply the following cli commands: >ri20$ reads the hex value of register 0x2020 >8e response from demo code indicating the bit 7 is set >ri20=e writes the hex value 0x0e to register 0x2020 causing the lcd boost to be switched off >ri20=8e enables the lcd boost circuit the lcd_clk register determines the frequency at which the com pins change st ates. a slower clock means lower power consumption, but if the clock is too slow, visible fli cker can occur. the default clock frequency for the 71m6533/6533h demo boards is 150hz ( lcd_clk = 01). register name address [bits] r/w description lcd_clk[1:0] 2021[1:0] r/w sets the lcd clock frequency, i.e. the frequency at which seg and com pins change states. f w = ckadc/128 = 38,400 00: f w /2 9 , 01: f w /2 8 , 10: f w /2 7 , 11: f w /2 6 to change the lcd clock frequency, we apply the following cli commands: >ri21$ reads the hex value of register 0x2021 >25 response from demo code indicating the bit 0 is set and bit 1 is cleared. >ri21=24 writes the hex value 0x24 to register 0x2021 clearing bit 0 ? lcd flicker is visible now >ri21=25 writes the original value back to lcd_clk 71m6533/71m6533h demo board user?s manual page: 58 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 2.6 teridian application notes please contact your local teridian sale s representative for teridi an application notes. some available application notes are listed below. number title an_651x_007 rogowski coil an_651x_008 optical port an_651x_009 temperatur e compensation an_651x_013 emulator upgrade an_652x_041 emc/emi guidelines an_651x_017 lcd an_651x_020 calibration for shunt and ct an_651x_022 calibration procedures 71m6533/71m6533h demo board user?s manual page: 59 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 3 hardware description 3.1 d6533t14a3 board description: jumpers, switches and test points the items described in the following tables refer to the flags in figure 3-1 . item # reference designator name use 1, 2, 6 tp2, tp4, tp6 va, vb, vc two-pin header test points. one pin is the va, vb, or vc line voltage input to the ic and the other end is v3p3. 4 jp1 ps_sel[0] a jumper is placed across jp1 to activate the internal power supply. jp1 is on the bottom of the board. caution: high voltage! do not touch! 3, 8, 11 j4, j6, j8 va_in, vb_in, vc_in va_in, vb_in, and vc_in are the line voltage inputs to the board. each input has a resistor divider that leads to the pin on the ic associated with the voltage input to the adc. these inputs are spade terminals mounted on the bottom of the board. caution: high voltage! do not touch these pins! 5 j9 neutral the neutral voltage input connected to v3p3. this input is a spade terminal mounted on the bottom of the board. 7 sw2 reset chip reset switch: when the sw itch is pressed, the reset pin of the ic is pulled high which resets the ic into a known state. 9 jp8 vbat, gnd three-pin header that allows selection of power to the vbat pin. when the jumper is placed between pins 1 and 2 (default setting of demo board) vbat is tied to the ic supply. an external battery can be connected between terminals 2 and 3. 10 sw3 pb pushbutton connected to the pb pin on the ic. this push- button can be used in conjunction with the demo code to wake the ic from sleep mode or lcd mode to brown-out mode. in mission mode, the pus hbutton serves to cycle the lcd display. 3 table 3-1: d6533t14a3 demo board description 71m6533/71m6533h demo board user?s manual page: 60 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 item # reference designator name use 12 j12 opt_rx, vbat, opt_tx, gnd five-pin header for access to the optical port (uart1). terminal 2 monitors the tx_opt output of the ic. terminal 4 monitors the opt_rx input to the ic. no jumper should be place across vbat and opt_tx_out 13 j1 5 volt external supply plug for connecting the external 5 vdc power supply. 14, 20, 24, 32 tp13, tp14, tp15, tp16 gnd gnd test points. 15 jp20 -- two-pin header for selecting the signal for the pulse led (d6). with a jumper between pins 1 and 2, rpulse is selected. pins 2 and 3 select ypulse. 16 d6 vars varh pulse led. 17 tp21 -- two-pin header providing access to the signals powering the rpulse led (d5). 18 jp19 seg21/dio08 two-pin header for selecting the signal for the pulse led (d5). with a jumper between pins 1 and 2, wpulse is selected. pins 2 and 3 select xpulse. 19 tp20 -- two-pin header providing access to the signals powering the wpulse led (d6). 21 d5 watts wh pulse led. 22 jp16 bat mode selector for the operati on of the ic when main power is re- moved. a jumper across pins 2- 3 (default) indicates that no external battery is available. the ic will stay in brownout mode when the system power is down and it will communi- cate at 9600bd. a jumper across pins 1-2 indicates that an external battery is available. the ic will be able to transition from brownout mode to sleep and lcd modes when the system power is down and it will communicate at 300bd. 23 jp6 dio03_r three-pin header providing access to dio03. 25 jp7 ice_en to enable the ice interface a jumper is installed across pins 2 and 3. 26 u8 -- lcd display ? eight digits, 14 segments. 27 jp13, jp14, jp15 dio56, dio57, dio58 two-pin headers providing access to the dio signals dio56, dio57, and dio58. 28 j2 debug connector for debug board. 2x8 pin male header. 29 u5 -- the ic 71m6533/6533h soldered to the pcb. 30 tp8 cktest, tmuxout test points for access to the cktest and tmuxout pins on the ic. 31 tp17 vref test point for access to the vref pin on the ic. 33 tp10 v1_r three-pin header for cont rol of the v1 input to the ic. 34 j18 -- spi interface connector. 35, 39, 41, 43 j19, j20, j21, j22 ian/iap, ibn/ibp, icn/icp, idp two-pin headers for monitoring the current channel inputs. 36 j14 emulator i/f 2x10 emulator connector port for the signum ice adm-51 or for the teridian tfp-2 flash programmer. table 3-2: d6533t14a3 demo board description 71m6533/71m6533h demo board user?s manual page: 61 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 item # reference designator name use 37 j17 -- alternative connector for the ice interface. 38, 40, 42, 44 j3, j5, j7, j10 -- two-pin headers mount ed on the bottom of the board. the outputs from the cts ar e to be connected here. table 3-3: d6533t14a3 demo board description 9 5 8 12 13 22 20 11 14 15 21 1 2 6 7 4 3 16 18 19 27 26 23 10 25 28 29 30 31 32 33 34 24 35 37 36 40 38 41 42 43 17 39 44 figure 3-1: d6533t14a3 demo board - board description (default jumper settings indicated in yellow) 71m6533/71m6533h demo board user?s manual page: 62 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 3.2 board hardware specifications pcb dimensions ? diameter 6.5? (165.1mm) ? thickness 0.062? (1.6mm) ? he ight w/ components 1.5? (38.1mm) environmental ? ope rating temper ature -40?+85c (function of crystal oscillator affected outside ?10c to +60c) ? sto rage temperat ure -40c?+100c power supply ? usin g internal ac supply 240v?700v rms ? dc in put voltage (powered from dc supply) 5vdc 0.5v ? supp ly current 25ma typical input signal range ? ac voltage signals (va, vb, vc) 0?240v rms ? ac current signals (ia, ib, ic) from ct 0?0.25v p/p (176mv rms) interface connectors ? dc supply jack (j1) to wall transformer concentric connector, 2.5mm ? emulator (j14 and j17) 10x2 header, 0. 05? pitch and 6x1 header, 0.1? pitch ? voltage input signals spade terminals on pcb bottom ? current input signals 0.1? headers on pcb bottom ? debug board (j2) 8x2 header, 0.1? pitch ? spi interface 5x2 header, 0.1? pitch functional specification ? program memory 128kbyte flash memory ? nv memory 1mbit serial eeprom ? time base frequency 32.768khz, 20ppm at 25c ? time base temperature coefficient -0.04ppm/c2 (max) controls and displays ? reset push-button (sw2) ? pb push-button (sw3) ? numeric display 8-digit lcd, 14-segments per digit ? ?watts? red led (d5) ? ?vars? red led (d6) measurement range ? voltage 120?700 v rms (resistor division ratio 1:3,398) ? current 1.7 termination for 2,000:1 ct input (208a) 71m6533/71m6533h demo board user?s manual page: 63 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 4 4 appendix this appendix includes the following doc umentation, tables and drawings: 71m6533/71m6533h demo board description ? d6533t14a3 demo board electrical schematic ? d6533t14a3 demo board bill of materials ? d6533t14a3 demo board pcb layers (copper, silk screen, top and bottom side) ? d6533t14a3 demo board electrical schematic debug board description ? debug board electrical schematic ? debug board bill of materials ? debug board pcb layers (copper, silk screen, top and bottom side) 71m6533/71m6533h ic description ? 71m6533/71m6533h pin description ? 71m6533/71m6533h pin-out 71m6533/71m6533h demo board user?s manual 4.1 71m6533 demo board electrical schematic r6 100, 2w + c1 2200uf, 16v r7 130 + c2 10uf, 6.3v r4 25.5k r2 8.06k r101 100k 1 2 jp13 vbat 1 2 jp14 r100 100k gnd vbat r102 100k 1 2 jp15 gnd vbat v3p3 gnd r141 100, 2w r139 1.5 neutral l15 ferrite bead 600ohm r10 62 gnd r11 62 r12 62 uart_tx l1 ferrite bead 600ohm r9 68.1 6.8v, 1w neutral * wednesday, march 26, 2008 selection on board supply ext 5vdc supply thru j1 ext 5vdc supply thru debug board power supply selection table ps_sel[0] (jp1) in out out 1 2 3 j1 rapc712 1 g3 1 g6 uart_rx dio56 dio58 dio57 tmuxout cktest uart_tx * = 1206 package * * gnd footing holes v3p3 c46 30nf, 1000vdc debug connector 1 j4 va_in va_in va_in vbat rv1 varistor 1 2 jp1 ps_sel[0] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 j2 header 8x2 dio56 dio58 gnd gnd gnd gnd dio57 vbat cktest_t uart_tx_t tmuxout_t uart_rx 5vdc ext supply 1 2 tp8 cktest title size document number rev date: sheet of d6533t14a3 3.0 71m6533-4l-db neutral current capable b 13 + c4 10uf, 6.3v c5 0.1uf 1 tmuxout off page outputs c42 1000pf off page inputs u6 tl431 6 2 8 d4 1n4148 d3 1n4736a 1 c6 0.47uf, 1000vdc figure 4-1: teridian d6533t14a3 demo board: electrical schematic 1/3 page: 64 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 71m6533/71m6533h demo board user?s manual page: 65 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 r144 0 icp_in icn_in r133 0 r65 100, 2w r35 3.4 l6 ferrite bead 600ohm l7 ferrite bead 600ohm c23 1000pf icp r36 3.4 r23 750 icn c12 1000pf v3p3 1 2 j7 ic_in * * * v3p3 r54 750 v3p3 idn_in idp_in r138 0 r37 3.4 l10 ferrite bead 600ohm l19 ferrite bead 600ohm v3p3 r45 3.4 1 2 j10 id_in icp_in * ** 1 2 j21 ic off page outputs r142 0 ian_in iap_in va_in r131 0 r25 3.4 vb_in l3 ferrite bead 600ohm l2 ferrite bead 600ohm l11 ferrite bead 600ohm l13 ferrite bead 600ohm l12 ferrite bead 600ohm r143 0 idp_in icn_in v3p3 c9 1000pf idp vc_in neutral idn c11 1000pf c14 1000pf c13 1000pf ian vc_in iap va idn_in vb vc iap ibp icp c44 nc v3p3 r24 3.4 r14 750 ibn ian gnd 1 2 j19 ia icn r72 750 vc c8 1000pf * v3p3 v3p3 rv2 varistor v3p3 * rv3 varistor iap_in * r55 750 r56 750 c85 nc off page inputs gnd gnd c82 nc ian_in 1 2 j3 ia_in c71 nc r73 100, 2w c72 nc vb_in ibp_in neutral c73 nc r140 0 c74 nc c75 nc neutral c76 nc voltage connections gnd c47 nc c77 nc 1 2 j20 ib va_in r32 750 va r15 220k current connections gnd c78 nc ibn_in r52 750 v3p3 r81 10k vb c32 1000pf idp idn r53 750 v3p3 c33 1000pf 1 2 j22 id r57 750 r89 10k r90 10k 1 j9 neutral 1 2 tp2 va c83 nc gnd c15 1000pf gnd neutral r82 10k * c84 nc gnd ** v3p3 * = 1206 package r84 10k r31 4.7k r30 120k neutral r16 220k r19 220k r18 220k r17 220k c48 nc r20 220k r21 220k r27 220k r26 220k r29 220k r28 220k r47 220k r42 220k r43 220k r44 220k r51 4.7k r48 220k r41 220k 1 j6 vb_in r85 10k r38 220k r39 220k r50 120k r40 220k r49 220k ibp_in ibn_in r46 220k r132 0 r33 3.4 1 2 tp6 vc r71 4.7k r67 220k l4 ferrite bead 600ohm r62 220k v3p3 1 j8 vc_in l5 ferrite bead 600ohm r63 220k r64 220k 1 2 tp4 vb c16 1000pf r68 220k r61 220k v3p3 r70 120k ibp r58 220k r34 3.4 r59 220k r60 220k r22 750 r69 220k ibn r66 220k c10 1000pf v3p3 1 2 j5 ib_in gnd r87 10k * ** title size document number rev date: sheet of d6533t3a3 3.0 71m6533-4l-db neutral current capable b 23 thursday, march 27, 2008 r88 10k * figure 4-2: teridian d6533t14a3 demo board: electrical schematic 2/3 71m6533/71m6533h demo board user?s manual page: 66 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 title size document number rev date: sheet of d6533t3a3 3.0 71m6533-4l-db neutral current capable b 33 thursday, march 27, 2008 opt_tx v3p3 vb uart_rx tp1 tp seg28/dio08 1 2 3 tp10 v1 gnd c61 22pf rxtx vc gnd note: populate j14 or j17 but not both. ibn psdo opt_rx tmuxout seg30/dio10 seg35/dio15 seg35/dio15 c62 22pf c43 1000pf v3p3 v3p3 seg17 gnd r79 100 opt_rx gnd a0 1 a1 2 a2 3 gnd 4 sda 5 scl 6 wp 7 vcc 8 u4 ser eeprom vbat opt_tx c20 0.1uf e_rst gnd opt_tx_out uart_tx c49 1000pf c63 22pf xout r86 20.0k 1% r83 16.9k 1% gnd gnd gnd pclk gnd 1 2 3 4 5 6 j17 ice header c64 22pf seg02 seg38/dio18 pclk gnd icp seg28/dio08 seg18 r75 0 tp15 tp c53 100pf c69 1000pf tp16 tp v3p3d ice_en seg26/dio06 1 2 3 jp16 bat_mode pcsz c70 1000pf seg00 gnd reset c26 nc seg26/dio06 r99 62 seg49/dio29 tclk pcsz cktest r1 1k seg43/dio23 xout uart_rx r107 10k 1 2 3 jp20 uart_tx pulse output tmuxout cktest off page outputs vbat r113 100 seg12 seg27/dio07 icn seg37/dio17 c36 1000pf vbat c27 22pf dio56 seg36/dio16 off page inputs gnd idp gnd gnd c79 1000pf va vb icp vc iap ibp v1 ice_en d5 d6 r76 10k note: place c31, l14, c21 close to ic (u5) note: place c24, c25, y1 close to ic (u5) vbat r77 nc pb dio56 c57 1000pf dio57 dio58 gnd c80 1000pf 1 2 3 jp8 vbat seg20 ian 1 2 3 4 5 j12 opt if seg39/dio19 gnd + c45 10uf vbat iap xin c81 1000pf vbat c50 1000pf idp seg20 gnd ibn r91 1k gndd 1 seg9/e_rxtx 2 dio2/opt_tx 3 tmuxout 4 tx 5 seg3/pclk 6 v3p3d 7 seg19/cktest 8 v3p3sys 9 seg4/psdo 10 seg5/pcsz 11 seg37/dio17 12 seg38/dio18/mtx 13 dio56 14 dio57 15 dio58 16 dio3 17 com0 18 com1 19 com2 20 com3 21 seg67/dio47 22 seg68/dio48 23 seg69/dio49 24 seg70/dio50 25 seg00 26 seg01 27 seg02 28 seg34/dio14 29 seg35/dio15 30 seg64/dio44 31 seg49/dio29 32 seg36/dio16 33 seg6/psdi 34 seg50/dio30 35 seg07/mux_sync 36 seg08 37 seg65/dio45 38 gndd 39 seg63/dio43 40 seg47/dio27 41 seg46/dio26 42 seg45/dio25 43 seg33/dio13 44 seg12 45 seg44/dio24 46 seg13 47 seg14 48 seg15 49 seg71/dio51 50 seg16 51 seg17 52 seg18 53 seg43/dio23 54 ice_e 55 seg20 56 seg21 57 seg22 58 seg23 59 seg24/dio4/sdck 60 seg25/dio5/sdata 61 seg26/dio6/wpulse 62 seg27/dio7/rpulse 63 seg39/dio19 64 seg40/dio20 65 seg41/dio21 66 seg28/dio8/xpulse 67 seg29/dio9/ypulse 68 seg30/dio10 69 seg31/dio11 70 rx 71 vbat 72 v2p5 73 reset 74 gndd 75 gnda 76 v3p3a 77 vc 78 vb 79 va 80 idn 81 idp 82 icn 83 icp 84 ibn 85 ibp 86 ian 87 iap 88 vref 89 v1 90 dio1/opt_rx 91 gndd 92 xin 93 test 94 xout 95 nc 96 pb 97 seg11/e_rst 98 seg61/dio41 99 seg10/e_tclk 100 u5 6533-100tqfp seg37/dio17 c17 0.1uf dio57 c19 0.1uf gnd gnd tp14 tp tp13 tp seg18 c51 1000pf reset r31k vbat gnd c21 100pf c30 22pf r78 1k v3p3 gnd seg63/dio43 vbat gnd seg40/dio20 idn c52 1uf y1 32.768khz icn vref dio58 seg21 gnd gnd seg16 rst_emul gnd gnd c31 22pf cktest v2p5 r103 10k gnd 1 2 tp20 1 2 tp21 psdo gnd seg41/dio21 seg24/dio04 c24 33pf sw3 reset idn note: c53 and r107 should be close to the ic gnd rxtx e_rst r98 62 vbat seg07 psdi e_rxtx e_tclk r97 62 c25 15pf ibp tclk rst_emul 1 2 3 jp19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 j14 header 10x2 seg22 gnd seg14 r74 10k v3p3 v3p3 seg27/dio07 vbat c28 0.1uf v2p5 gnd r111 0 c22 0.1uf c29 nc seg13 l16 ferrite bead 600ohm seg28/dio08 seg25/dio05 gnd r105 10k r104 10k ice_en dio03 gnd seg12 v3p3d seg23 r108 1k xin seg30/dio10 note: place c29, r78 close to ic (u5) opt_tx tp17 vref e_tclk seg29/dio09 1 2 3 4 5 6 7 8 9 10 j18 spi interface va vbat uart_rx c18 0.1uf seg08 com0 c55 100pf r109 10k ian seg33/dio13 seg29/dio09 r110 0 1 2 3 jp6 header 3 vbat gnd dio03 seg63/dio43 serial eeprom optical i/f seg24/dio04 seg40/dio20 r106 5k v3p3 gnd gnd com2 gnd seg64/dio44 seg31/dio11 seg34/dio14 seg01 seg38/dio18 com1 com3 1 -,1f,1e,1d 2 3 3 -,2f,2e,2d 4 5 5 -,3f,3e,3d 6 7 7 -,4f,4e,4d 8 9 9 -,5f,5e,5d 10 11 11 -,6f,6e,6d 12 13 13 -,7f,7e,7d 14 15 15 -,8f,8e,8d 16 17 17 com2 18 com0 19 8a,8b,8c,8dp 20 21 21 7a,7b,7c,7dp 22 23 23 6a,6b,6c,6dp 24 25 25 5a,5b,5c,5dp 26 27 27 4a,4b,4c,4dp 28 29 29 3a,3b,3c,3dp 30 31 31 2a,2b,2c,2dp 32 33 33 1a,1b,1c,1dp 34 35 35 com1 36 u8 vim-828-dp seg65/dio45 seg41/dio21 seg22 com3 seg17 seg28/dio08 seg39/dio19 seg07 seg13 seg33/dio13 seg15 seg65/dio45 gnd com1 seg43/dio23 seg49/dio29 emulator i/f com0 lcd 1 2 3 jp7 ice_en seg02 sw2 reset gnd com2 seg08 seg64/dio44 seg23 seg25/dio05 psdi vbat com3 seg01 seg15 e_rxtx c3 0.1uf seg31/dio11 seg34/dio14 v3p3 seg36/dio16 gnd seg21 seg16 c54 nc seg00 seg14 figure 4-3: teridian d6533t14a3 demo board: electrical schematic 3/3 71m6533/71m6533h demo board user?s manual page: 67 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 4.2 71m6533 demo board bill of material item q reference part pcb footprint digi-key/mouser part number part number manufacturer 1 1 c1 2200uf radial p5143-nd eca-1cm222 panasonic 2 3 c2,c4,c45 10uf rc1812 478-1672-1-nd tajb106k010r avx 3 8 c5,c17-c20,c22,c28,c29 0.1uf rc0603 445-1314-1-nd c1608x7r1h104k tdk 4 1 c6 0.47uf b1918-nd 2222 383 30474 vishay 5 29 c8-c13,c15,c23,c33-c44 1000pf rc0603 445-1298-1-nd c1608x7r2a102k tdk c47-c51, c56-c59 6 3 c21,c32,c54 nc rc0603 7 1 c24 33pf rc0603 445-1275-1-nd c1608c0g1h330j tdk 8 1 c25 7pf rc0603 490-3564-1-nd gqm1885c1h7r0cb01d murata 9 13 c26,c27,c31,c60-c68 22pf rc0603 445-1273-1-nd c1608c0g1h220j tdk 10 1 c46 0.03uf axial 75-125ls30-r 125ls30-r vishay 11 1 c52 1uf rc0603 pcc2224ct-nd ecj-1vb1c105k panasonic 12 2 c53,c55 100pf rc0603 445-1281-1-nd c1608c0g1h101j tdk 13 1 d1 uclamp3301d sod-323 -- uclamp3301d.tct semtech 14 1 d3 6.8v zener d041 1n4736adict-nd 1n4736a-t diodes 15 1 d4 switching diode d035 1n4148dict-nd 1n4148-t diodes 16 2 d5,d6 led radial 404-1104-nd h-3000l stanley 17 1 d8 nc sod-323 18 1 j1 dc jack (2.5mm) rapc712 502-rapc712x rapc712x switchcraft 19 1 j2 header 8x2 8x2pin s2011e-36-nd pzc36daan sullins 20 4 j3,j5,j7,j16 header 2 2x1pin s1011e-36-nd pzc36saan sullins 21 4 j4,j6,j8,j9 spade terminal a24747ct-nd 62395-1 amp 22 1 j10 dual row 12x2 pin male 12x2pin 929665-09-12-nd 3m 23 1 j11 dual row 12x2 pin female 12x2pin s7115-nd pppc122lfbn-rc sullins 24 1 j12 header 5 5x1pin s1011e-36-nd pzc36saan sullins 25 1 j13 header 4 4x1pin s1011e-36-nd pzc36saan sullins 26 1 j14 10x2 connector, 0.05" 571-5-104068-1 5-104068-1 amp 27 1 j17 header 6 6x1pin s1011e-36-nd pzc36saan sullins 28 1 j18 header 5x2 5x2pin s2011e-36-nd pzc36daan sullins 29 6 jp1,jp13,jp14,jp15,jp17,jp18 header 2 2x1pin s1011e-36-nd pzc36saan sullins 30 5 jp6,jp7,jp8,jp16,jp19,jp20 header 3 3x1pin s1011e-36-nd pzc36saan sullins 31 1 jp12 header 9 9x1pin s1011e-36-nd pzc36saan sullins 32 17 l1-l9,l11-l18 ferrite bead, 600 ohm rc0805 445-1556-1-nd mmz2012s601a tdk 33 3 rv1,rv2,rv3 varistor radial 594-2381-594-55116 238159455116 vishay 34 1 r2 8.06k, 1% rc0805 311-8.06kcrct-nd rc0805fr-078060kl yageo 35 1 r4 25.5k, 1% rc0805 311-25.5kcrct-nd rc08052fr-072552l yageo 36 4 r6,r65,r73,r141 100, 2w axial 100w-2-nd rsf200jb-100r yageo 37 1 r7 130, 1% rc1206 311-130frct-nd rc1206fr-071300l yageo 38 1 r9 68, 1% rc1206 311-68.0frct-nd rc1206fr-0768r0l yageo 39 11 r10,r11,r12,r90,r92,r93, 62 rc0805 p62act-nd erj-6geyj620v panasonic r95,r96,r97,r98,r99 40 7 r14,r32,r34,r52,r53,r72, 750, 1% rc0805 p750cct-nd erj-6enf7500v panasonic r135 41 33 r15-r21,r26-r29,r38-r44, 220k, 1% rc0805 311-220kcrct-nd rc0805fr-07220kl yageo r46-r49,r58-r64,r66-r69 42 8 r24,r25,r36,r37,r56,r57 3.4, 1% rc1206 311-3.40frct-nd rc1206fr-073r40l yageo r136,r137 43 3 r30,r50,r70 120k, 1% rc0805 311-120kcrct-nd rc0805fr-071203l yageo 44 3 r31,r51,r71 4.70k, 1% rc0805 311-4.70kcrct-nd rc0805fr-074701l yageo 45 9 r74,r76,r80,r103,r104,r105, 10k rc0805 p10kact-nd erj-6geyj103v panasonic r106,r107 46 2 r75,r94 0 rc0805 p0.0act-nd erj-6gey0r00v panasonic 47 1 r77 nc rc0805 48 4 r78,r91,r108,r111 1k rc0805 p1.0kact-nd erj-6geyj102v panasonic 49 2 r79, r110 100 rc0805 p100act-nd erj-6geyj101j panasonic 50 1 r83 16.9k, 1% rc0805 p16.9kcct-nd erj-6enf1692v panasonic 51 1 r86 20.0k, 1% rc0805 p20.0kcct-nd erj-6enf2002v panasonic 52 3 r100,r101,r102 100k rc0805 p100kact-nd erj-6geyj104v panasonic 53 4 r131,r132,r133,r134 0 rc1206 p0.0ect-nd erj-8gey0r00v panasonic 54 1 r139 1.5 rc1206 p1.5ect-nd erj-8geyj1r5v panasonic 55 1 sw2,sw3 switch p8051sct-nd evq-pjx05m panasonic 56 10 tp1-tp8,tp20,tp21 tp 2x1pin s1011e-36-nd pzc36saan sullins 57 1 tp10 tp 3x1pin s1011e-36-nd pzc36saan sullins 58 4 tp13-tp16 test point 5011k-nd 5011 keystone 1) 60 3 u1,u2,u3,u7 bav99dw sot363 bav99dw-fdict-nd bav99dw-7-f diodes 61 1 u4 ser eeprom so8 at24c256bn-10su-1.8-nd at24c256bn-10su-1.8 atmel 62 1 u5 71m6533 100tqfp -- 71m6533-igt teridian 63 1 at u5 100tqfp socket 100tqfp -- ic149-100-154b51 yamaichi 64 1 u6 regulator, 1% so8 296-1288-1-nd tl431aidr texas instruments 65 1 y1 32.768khz xc1195ct-nd ecs-.327-12.5-17x-t r ecs 66 1 u8 lcd, 3.3v 153-1110-nd vim-828-dp5.7-6-rc-s-lv varitronix 2) table 4-1: d6533t14a3 demo board: bill of material 71m6533/71m6533h demo board user?s manual page: 68 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 4.3 71m6533 demo board pcb layout figure 4-4: teridian d6533t 14a3 demo board: top view 71m6533/71m6533h demo board user?s manual page: 69 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-5: teridian d6533t14a3 demo board: top copper 71m6533/71m6533h demo board user?s manual page: 70 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-6: teridian d6533t14a3 demo board: middle layer 1 (ground plane) 71m6533/71m6533h demo board user?s manual page: 71 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-7: teridian d6533t14a3 demo board: middle layer 2 (supply plane) 71m6533/71m6533h demo board user?s manual page: 72 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-8: teridian d6533t14a 3 demo board: bottom copper 71m6533/71m6533h demo board user?s manual page: 73 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-9: teridian d6533t14a3 demo board: bottom view 71m6533/71m6533h demo board user?s manual 4.4 debug board bill of material item q reference v alue pcb footprint p/n manufacturer v endor v endor p/n 1 21 c1-c3,c5-c10,c12-c23 0.1uf 0805 c2012x7r1h104k tdk digi-key 445-1349-1-nd 2 1 c4 33uf/10v 1812 tajb336k010r avx digi-key 478-1687-1-nd 3 1 c11 10uf/16v, b case 1812 tajb106k016r avx digi-key 478-1673-1-nd 4 2 d2,d3 led 0805 ltst-c170kgkt liteon digi-key 160-1414-1-nd 5 4 jp1,jp2,jp3,jp4 hdr2x1 2x1pin pzc36saan sullins digi-key s1011-36-nd 6 1 j1 rapc712 rapc712 switchcraft digi-key sc1152-nd 7 1 j2 db9 db9 a2100-nd amp digi-key a2100-nd 8 1 j3 header 8x2 8x2pin pptc082lfbn sullins digi-key s4208-nd 9 4 r1,r5,r7,r8 10k 0805 erj-6geyj103v panasonic digi-key p10kact-nd 10 2 r2,r3 1k 0805 erj-6geyj102v panasonic digi-key p1.0kact-nd 11 1 r4 nc 0805 n/a n/a n/a n/a 12 1 r6 0 0805 erj-6gey0r00v panasonic digi-key p0.0act-nd 13 1 sw2 pb switch pb evq-pjx05m panasonic digi-key p8051sct-nd 14 2 tp5,tp6 test point tp 5011 keystone digi-key 5011k-nd 15 5 u1,u2,u3,u5,u6 adum1100 soic8 adum1100ar adi digi-key adum1100ar-nd 16 1 u4 max3237cai sog28 max3237cai maxim digi-key max3237cai-nd 17 4 spacer 2202k-nd keystone digi-key 2202k-nd 18 4 4-40, 1/4" screw pms4400-0025ph building fasteners digi-key h342-nd 19 2 4-40, 5/16" screw pms4400-0031ph building fasteners digi-key h343-nd 20 2 4-40 nut hnz440 building fasteners digi-key h216-nd table 4-2: debug board: bill of material page: 74 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 7 1m6533/71m6533h demo board user?s manual page: 75 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 4.5 debug board schematics + c11 10uf, 16v (b case) c15 0.1uf c13 0.1uf vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u5 adum1100 vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u6 adum1100 c19 0.1uf gnd_dbg c23 0.1uf gnd_dbg gnd c21 0.1uf v5_dbg gnd v3p3 c14 0.1uf c18 0.1uf c17 0.1uf c2 0.1uf gnd_dbg c1 0.1uf v3p3 gnd dio02 v5_dbg gnd_dbg c3 0.1uf v5_dbg gnd_dbg dio01 vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u2 adum1100 dio00 gnd_dbg gnd c8 0.1uf gnd_dbg gnd_dbg v5_dbg dio01_dbg c5 0.1uf v3p3 c6 0.1uf r2 1k d2 led gnd_dbg dio01 v5_dbg gnd gnd 232vp1 rxpc 232vn1 232c1p1 232c1m1 232c2m1 r1 10k gnd_dbg gnd r3 1k c10 0.1uf v5_dbg gnd_dbg gnd dio00 vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u3 adum1100 v3p3 c9 0.1uf v3p3 c12 0.1uf gnd gnd_dbg v5_dbg d3 led dio00_dbg gnd_dbg v5_dbg c22 0.1uf 1 2 jp4 hdr2x1 gnd_dbg vdd1 1 din 2 vdd1 3 gnd1 4 gnd2 5 dout 6 gnd2 7 vdd2 8 u1 adum1100 v5_dbg gnd_dbg gnd_dbg gnd_dbg gnd gnd gnd uart_tx v3p3 v3p3 gnd uart_rx_t sw2 display sel c20 0.1uf gnd v5_dbg gnd_dbg 1 2 3 j1 rapc712 c16 0.1uf v3p3 gnd v5_dbg v5_dbg gnd_dbg gnd gnd tp6 tp tp5 tp r7 10k r5 10k r4 nc 1 6 2 7 3 8 4 9 5 j2 db9_rs232 r8 10k 5vdc ext supply debug connector status leds rs232 transceiver r6 0 uart_rx tx232 normal 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 j3 header 8x2 dio00 gnd gnd gnd dio02 v5_dbg gnd_dbg gnd cktest v3p3 dio01 uart_rx_t uart_tx tmuxout v5_dbg gnd_dbg 232c2p1 normal null null rx232 v5_dbg gnd_dbg gnd_dbg txpc txiso rxiso + c4 33uf, 10v c7 0.1uf 1 2 jp3 hdr2x1 1 2 jp1 hdr2x1 1 2 jp2 hdr2x1 c1+ 28 c1- 25 c2+ 1 c2- 3 t1in 24 t2in 23 t3in 22 t4in 19 t5in 17 r1outbf 16 r1out 21 r2out 20 r3out 18 gnd 2 mbaud 15 shdnb 14 enb 13 r3in 11 r2in 9 r1in 8 t1out 5 t2out 6 t3out 7 t4out 10 t5out 12 v- 4 v+ 27 vcc 26 u4 max3237cai figure 4-10: debug board: electrical schematic 71m6533/71m6533h demo board user?s manual page: 76 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 4.6 debug board pcb layout figure 4-11: debug board: top view figure 4-12: debug board: bottom view 71m6533/71m6533h demo board user?s manual page: 77 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-13: debug board: top signal layer figure 4-14: debug board: middle layer 1 (ground plane) 71m6533/71m6533h demo board user?s manual page: 78 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-15: debug board: middle layer 2 (supply plane) figure 4-16: debug board: bottom trace layer 71m6533/71m6533h demo board user?s manual page: 79 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 4.7 teridian 71m6533 pin-out information power/ground/nc pins: name type pin # description gnda p 76 analog ground: this pin should be connected directly to the ground plane. gndd p 1, 39, 75, 92 digital ground: this pin should be c onnected directly to the ground plane. v3p3a p 77 analog power supply: a 3.3v power supply should be connected to this pin. v3p3a must be the same voltage as v3p3sys. v3p3sys p 9 system 3.3v supply. this pin should be connected to a 3.3v power supply. v3p3d p 7 auxiliary voltage output of the chip, controlled by the internal 3.3v selection switch. in mission mode, this pin is interna lly connected to v3p3sys. in brownout mode, it is internally connected to vbat. this pin is floating in lcd and sleep mode. vbat p 72 battery backup power and oscillator supply. a battery or super-capacitor is to be connected between vbat and gndd. if no battery is used, connect vbat to v3p3sys . v2p5 o 73 output of the internal 2.5v regulator. a 0.1f c apacitor to gnda should be connected to this pin. table 4-3: 71m6533/71m6533h pi n description table 1/3 analog pins: name typ e pin # description iap/ian, ibp/ibn, icp/icn, idp/idn i 88,87, 86,85, 84,83, 82,81 differential line current sens e inputs: these pins are vo ltage inputs to the internal a/d converter. typically, they are connected to the outputs of current sensors. unused pins must be tied to v3p3a. idp/idn are additional line current sense input pins. va, vb, vc i 80, 79, 78 line voltage sense inputs: these pins are voltage inputs to the internal a/d converter. typically, they are connected to the outputs of resistor dividers. unused pins must be tied to v3p3a. v1 i 90 comparator input: this pin is a voltage input to the internal comparator. the voltage applied to the pin is compared to an inter nal bias voltage (1.6v). if the input voltage is above the reference, the comparator output will be hi gh (1). if the comparator output is low, a voltage fault will occur. a series 5k resistor should be connected from v1 to the resistor divider. vref o 89 voltage reference for the adc. th is pin should be left unconnected (floating). xin xout i 93, 95 crystal inputs: a 32khz crystal should be connected across these pins. typically, a 33pf capacitor is also connected from xin to gnda and a 15pf capacitor is connected from xout to gnda. it is impor tant to minimize the capacitance bet- ween these pins. see the crystal manufacturer datasheet for details. table 4-4: 71m6533/71m6533h pi n description table 2/3 71m6533/71m6533h demo board user?s manual page: 80 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 digital pins: name typ e pin # description com3, com2, com1, com0 o 21, 20, 19, 18 lcd common outputs: these 4 pins provide the select signals for the lcd display. seg0?seg2, seg12, seg13?seg15, seg16?seg18, seg20?seg23, dio3, dio56?dio58 o 26-28, 45 47-49, 51-53 56-59, 17, 14-16 dedicated lcd segment outputs. seg24/dio4 ? seg31/dio11, seg33/dio13 ? seg41/dio21, seg43/dio23 ? seg47/dio27, seg49/dio29 ? seg50/dio30, seg61/dio41, seg63/dio43 ? seg65/dio45, seg67/dio47 ? seg71/dio51 i/o multi-use pins, configurable as either lcd seg driver or dio. (dio4 = sck, dio5 = sda when configured as eepr om interface, wpulse = dio6, varpulse = dio7, dio8 = xpulse, dioo9 = ypulse when configured as pulse outputs). unused pins must be configured as outputs or tied to v3p3d or gndd. seg3/pclk seg4/psdo seg5/pcsz seg6/psdi i/o 6, 10, 11, 34 multi-use pins, configurable as either lcd segment driver or spi port. e_rxtx/seg9 i/o 2, 98 multi-use pins, configurable as either emulator port pins (when ice_e pulled high) or lcd seg drivers (when ice_e tied to gnd). e_rst/seg11 e_tclk/seg10 o 100 ice_e i 55 ice enable. when low, e_rst, e_tclk, and e_rxtx become lcd segment pins. for production units, this pin should be pulled to gnd to disable the emulator port. cktest/seg19, muxsync/seg7 o 8, 36 multi-use pins, configurable as either clock pll/multiplexer control outputs or lcd segment drivers. ckt est can be enabled and disabled by ckout_en . tmuxout o 4 digital output test multiplexer. controlled by dmux[3:0]. 71m6533/71m6533h demo board user?s manual page: 81 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 name typ e pin # description opt_rx/dio1 i/o 91 multi-use pin, configurabl e as either optical receive input or general dio. when configured as opt_rx, this pin is a regular uart rx pin. if this pin is unused it must be configured as an output or tied to v3p3d or gndd. opt_tx/dio2 i/o 3 multi-use pin, configurable as eit her optical led transmit output. when configured as opt_tx, this pin is c apable of directly driving an led for transmitting data in an ir serial interface. reset i 74 chip reset: this input pin is used to re set the chip into a known state. for normal operation, this pin is pulled low. to reset the chip, this pin should be pulled high. this pin has an internal 30 a (nominal) current source pull- down. no external reset circuitry is necessary. rx i 71 uart input. if this pin is unused it must be configured as an output or tied to v3p3d or gndd. tx o 5 uart output. test i 94 enables production test. this pin must be grounded in normal operation. pb i 97 push button input. should be at gnd when not active. a rising edge sets the ie_pb flag. it also causes the part to wake up if it is in sleep or lcd mode. pb does not have an internal pull-up or pull-down resistor. table 4-5: 71m6533/71m6533h pi n description table 3/3 pin types: p = power, o = out put, i = input, i/o = input/output 71m6533/71m6533h demo board user?s manual page: 82 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 figure 4-17: teridian 71m6533/71m6533h eplqfp100: pinout (top view) 71m6533/71m6533h demo board user?s manual page: 83 of 83 ? 2005-2008 teridian semiconductor corporation v1-2 4.8 revision history revision date description 1.0 1-30-2008 initial release 1.1 2-5-2008 updated copyright date in f ooters. added text stati ng that no jumper should be across vbat and opt_tx_out (j12) and updated figure 3-1. updated pin description tables. co rrected figure 2-9, added load line graph for differential mode. 1.2 2-25-2008 updated to include demo board revision d6533t14a3 and new pin-out arrangement of 71m6533. updated calibration procedures section. user?s manual: this user?s manual contains proprie tary product definition information of teridian semiconductor corporation (tsc) and is made available for informati onal purposes only. teridian assumes no obligation regarding future manufacture, unless agreed to in writing. if and when manufactured and sold, this product is sold subject to the terms and conditions of sale supplied at the time of ord er acknowledgment, including those pertaining to warranty, patent in fringement and limitation of liability. teridian semiconducto r corporation (tsc) reserves the right to ma ke changes in specifications at any time without notice. accordingly, the reader is cautioned to verify that a data sheet is current before plac ing orders. tsc assumes no liability for applications assistance. teridian semiconductor corp., 6440 oak canyon road, irvine, suite 100, ca 92618-5201 tel (714) 508-8800, fax (714) 508-8877, http ://www.teridian.com |
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